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| lkcl | ghostmansd, you can't ignore the source/destination on extra_idx mappings | 02:56 |
|---|---|---|
| lkcl | if you look at the original code (which you removed) you'll find that the "s:" and "d:" is absolutely critical | 02:57 |
| lkcl | however now with making "RA" both a source *and* a destination in the same index-spot, the code's not coping | 03:01 |
| lkcl | got it | 04:28 |
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| lkcl | holy cow pointer-chasing works | 11:49 |
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| programmerjake | lkcl: when you changed f"" to % you inadvertently inserted a space in an identifier, likely breaking vhdl output: https://git.libre-soc.org/?p=openpower-isa.git;a=blob;f=src/openpower/sv/sv_analysis.py;h=5b39295e9576f104130d0e1cbc4d3c6a5405e6a1;hb=62c04f760e63c3f98e5ed4a1f20944c9a8f3ea74#l229 | 17:07 |
| ghostmansd[m] | Yet another reason to use f-strings? | 17:26 |
| ghostmansd[m] | lkcl, thanks for insndb fix! | 17:27 |
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| ghostmansd | lkcl, 3 tests fail on master: https://salsa.debian.org/Kazan-team/mirrors/openpower-isa/-/jobs/4219032 | 19:41 |
| ghostmansd | All three are vli-related | 19:43 |
| ghostmansd | I assume vli is no longer with us? | 19:44 |
| ghostmansd | Is vli in the same room with us right now?... | 19:45 |
| lkcl | programmerjake, whoops. | 19:57 |
| lkcl | ghostmansd, no it's just a mistake | 19:57 |
| lkcl | the VHDL is not actually used | 19:57 |
| lkcl | ghostmansd, yes i know. attempting to track it down. oh - i put in an extraneous space, doh | 20:01 |
| lkcl | the sv.crand one i am in the middle of. no idea why "/vli" is now missing | 20:02 |
| lkcl | where the heck's the CROp mode-setting thingy? | 20:07 |
| lkcl | got it | 20:07 |
| lkcl | ghostmansd, sorted, i had to swap Mode[0] and Mode[1] in CROps, tracked down selector.mode.sel - all good | 20:19 |
| lkcl | oh fer god's sake :) | 20:20 |
| lkcl | broke the rest of sv.cmp :) | 20:20 |
| lkcl | on it | 20:36 |
| lkcl | but found another one of these - sv.cmp/ff=eq *4,1,*0,1 | 20:36 |
| lkcl | BF (vector) | 20:36 |
| lkcl | 00100 | 20:36 |
| lkcl | 38, 39, 40, 19, 20, {0}, {0} | 20:36 |
| lkcl | extra3<generator object ExtendableOperand.extra_idx at 0x7f9b7694b840> | 20:36 |
| ghostmansd | Sigh, yes, CRs are always special | 20:44 |
| ghostmansd | So special that in fact much of the code is copied there | 20:44 |
| ghostmansd | I'll fix it | 20:44 |
| ghostmansd | (not the copy itself, but a bug) | 20:44 |
| ghostmansd | (fixing the copy needs CRs to be less special) | 20:44 |
| lkcl | found it | 20:47 |
| lkcl | sorted | 20:47 |
| lkcl | not yet picking up ff mode on sv.cmp, sigh. haven't tracked down if it's disassembly or assembly yet | 20:52 |
| lkcl | crop: ffirst 3-bit mode | 20:53 |
| lkcl | RM | 20:53 |
| lkcl | it's disassembly | 20:53 |
| ghostmansd | thanks Luke! | 20:54 |
| ghostmansd | I'm dealing with trace files, so there might be delays in replies :-) | 20:56 |
| ghostmansd | but I see that you can already navigate through insndb :-) | 20:57 |
| vaino[m] | lkcl: I'll send you an e-mail, for the meeting link | 20:58 |
| ghostmansd | frankly this is surprising, not because I underestimate you, but because sometimes things get real tricky there | 20:58 |
| lkcl | ghostmansd, just about | 20:59 |
| lkcl | vaino[m], great - you should already have it in a pm from me, last week though | 21:00 |
| lkcl | although stick around in IRC because last week it was hilarious, they have clearly upgraded jitsi and utterly stuffed it up | 21:00 |
| lkcl | (WebRTC sigh) | 21:00 |
| vaino[m] | Ah, I didn't seem to get it, could it be because I'm using Matrix? | 21:01 |
| lkcl | ghostmansd, i'm used to navigating code like this, but also remember i know the spec | 21:01 |
| lkcl | vaino[m], possibly. i don't use it so i don't know how it works (or doesn't work) | 21:01 |
| lkcl | although ghostmansd sends me messages from it no problem | 21:02 |
| vaino[m] | ah! got your pm now | 21:02 |
| lkcl | ghostmansd, 5-bit CRops is swapped round with 3-bit CRops | 21:02 |
| lkcl | ngggggggggggh | 21:07 |
| lkcl | slowly bludgeoning my way through this... :) | 21:07 |
| ghostmansd | lkcl, IIRC there was the giant discussion about whether it's swapped or not :-) | 21:12 |
| ghostmansd | that time you was totally buried with other works, so I had to move on my own... | 21:12 |
| ghostmansd | I'm too lazy to dig it in IRC, but I raised some questions on whether these are swapped or not, perhaps you remember | 21:13 |
| ghostmansd | apparently I got it the wrong way :-D | 21:13 |
| lkcl | ghostmansd, can't even remember - vaguely | 21:16 |
| lkcl | wark-wark | 21:16 |
| lkcl | sorting it out... slowly... | 21:16 |
| lkcl | ghostmansd, if /ff is placed first in the specifiers the assembly results are incorrect | 21:45 |
| lkcl | presumably bit 6 (/zz) is overwritten by later specifiers | 21:45 |
| lkcl | + "sv.cmp/zz/ff=gt/m=r3 *4,1,*0,1", # WRONG | 21:47 |
| lkcl | i can't cope with that | 21:47 |
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| ghostmansd | lkcl, it seems that ff and zz are in conflict, hang on | 22:24 |
| ghostmansd | ff: https://git.libre-soc.org/?p=openpower-isa.git;a=blob;f=src/openpower/decoder/power_insn.py;h=1e909669207f0617f40fd850c81e7950b932a8c2;hb=refs/heads/master#l2581 | 22:24 |
| ghostmansd | echo "sv.cmp/zz/ff=gt/m=r3 *4,1,*0,1" | SILENCELOG=true pysvp64asm | powerpc64le-linux-gnu-as - -o /tmp/elf.o && powerpc64le-linux-gnu-objcopy -Obinary /tmp/elf.o /tmp/bin.o && pysvp64dis -v < /tmp/bin.o | 22:27 |
| ghostmansd | RM.zz is bit 14... | 22:28 |
| ghostmansd | Here's the whole RM via print(insn.rm.__class__) | 22:34 |
| ghostmansd | https://pastebin.com/ET23J518 | 22:34 |
| ghostmansd | or, better, insn.rm.crop.__class__ | 22:35 |
| ghostmansd | https://pastebin.com/AFuAuFdL | 22:35 |
| ghostmansd | or, even better, what's "selected" upon insn.select(record=db[insn]).rm.__class__ | 22:38 |
| ghostmansd | https://pastebin.com/VTAR5Jg9 | 22:38 |
| ghostmansd | ewsrc? | 22:39 |
| lkcl | RM.zz is bit 6 in CRops | 22:45 |
| lkcl | ahh yes. | 22:45 |
| lkcl | ewsrc is *disabled* in CRops. | 22:46 |
| lkcl | Field(6, 8, 10, 11, 12, 13, 14, | 22:46 |
| lkcl | RM.zz is Field[6] in that | 22:46 |
| lkcl | so yes RM.zz is bit 14 (of the 32-bit prefix, not of RM itself) | 22:47 |
| lkcl | ok so ewsrc - that's the clue i needed | 22:47 |
| lkcl | nope - not having any of it. | 23:23 |
| ghostmansd | I'll take a look at it tomorrow. | 23:24 |
| ghostmansd | The fact that we have ewsrc does not imply we write there... :-) | 23:24 |
| ghostmansd | I'll have to add some debug code. | 23:24 |
| ghostmansd | BTW, you're welcome to check tracefile branch. :-) | 23:25 |
| ghostmansd | https://git.libre-soc.org/?p=openpower-isa.git;a=commitdiff;h=d781f80c9b3e0e48b36ac5b5bca760d0f52468a8 | 23:26 |
| ghostmansd | Yeah I know you don't like dataclasses... I had to add one for explicitness. Please let me know if this is a total vomit factor here, and I'll drop it. | 23:26 |
| ghostmansd | I refactored the trace a little bit, but other than that, it's the same. | 23:27 |
| ghostmansd | I tried to keep regexes simple and straightforward, though. | 23:28 |
| lkcl | SpecifierFF is somehow overwriting SpecifierZZ | 23:28 |
| lkcl | ghostmansd, yes please don't use dataclasses. | 23:29 |
| lkcl | this code should be BARE minimum absolute dead simple | 23:29 |
| lkcl | someone inexperienced in python should be able to look at this and go, "oh, that's really obvious" | 23:30 |
| lkcl | dataclasses are therefore a "hard no" | 23:30 |
| lkcl | and regexs are borderline | 23:30 |
| lkcl | as long as there is adequate comments explaining what they are, they're ok. | 23:30 |
| lkcl | i *cannot* read regexs, period. | 23:31 |
| lkcl | also don't bother doing a branch, just shove everything straight into that file - there should be no other imports, no other code used | 23:32 |
| lkcl | also please please stop doing "import x as _x" | 23:32 |
| lkcl | it is really irritating and unnecessary. | 23:32 |
| lkcl | once power_insn.py stabilises i will go through it and remove all uses of underscores in front of all imports | 23:33 |
| lkcl | i don't care in the least about the imports showing up in the list of module properties | 23:33 |
| lkcl | it's just not as important as making for readable code that in peoples' minds, when they "sub-vocalise" a reading of the text | 23:34 |
| lkcl | they are not slowed down by hearing, in their mind, ***UNDERSCORE*** enum | 23:34 |
| lkcl | UUUUNNNDERSCOOORRRE re | 23:34 |
| lkcl | **UNDERSCORE** SVP64 | 23:35 |
| lkcl | etc. | 23:35 |
| lkcl | 307 "rGPR:0.0/64 wGPR:1.0/64 # addi 1, 0, 0x0010", | 23:37 |
| lkcl | 308 "rGPR:0.0/64 wGPR:2.0/64 # addi 2, 0, 0x1234", | 23:37 |
| lkcl | this is great. yes good idea to move the instruction to the end | 23:37 |
| lkcl | what i'd do - and this ends up literally in like 3 lines of code | 23:38 |
| lkcl | * format is always the same separator: a colon would do | 23:38 |
| lkcl | then you do | 23:38 |
| lkcl | specs, insn = map(string.strip, x.split("#") | 23:39 |
| lkcl | for spec in specs: | 23:39 |
| lkcl | (reg, num, offs, elwidth) = spec.split(":") | 23:39 |
| lkcl | that's it. | 23:39 |
| lkcl | done. | 23:39 |
| lkcl | three lines. | 23:40 |
| lkcl | those 3 lines replace *almost a hundred* (!) | 23:40 |
| lkcl | if you really want to put the data into something with names, use a namedtuple | 23:42 |
| lkcl | that'll be (gosh) a whole two extra lines, shock-horror :) | 23:43 |
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