lkcl | indeed | 00:08 |
---|---|---|
* lkcl thinks | 00:08 | |
lkcl | it doesn't matter "per se" because RA=0 is an illegal instruction | 00:20 |
lkcl | ghostmansd, hang on, reading the spec it looks like RA_OR_ZERO for ldu is a bug | 00:23 |
lkcl | it should just be "RA" | 00:25 |
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programmerjake | oh, it just occurred to me, since memory accesses aren't overridden by elwid, we'll need 16-bit fp loads/stores | 10:18 |
programmerjake | lkcl: what do you think? | 10:18 |
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ghostmansd[m] | lkcl, please also check this: https://libre-soc.org/irclog/%23libre-soc.2023-05-30.log.html#t2023-05-30T18:32:28 | 12:15 |
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lkcl | programmerjake, arrrgh good point | 16:06 |
lkcl | ghostmansd, it is a bug. | 16:06 |
lkcl | reading the spec you cannot have RA=0 for ldu or ldux | 16:08 |
lkcl | those instructions *both* need to have their csv lines changed to ...,RA,....,RA,... | 16:08 |
lkcl | ghostmansd, i'm doing EXTRA332 at the moment | 16:09 |
lkcl | programmerjake, ok actually now i think about it that's not such a bad idea | 16:34 |
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ghostmansd | lkcl, you reply demonstrates that you didn't read the question. | 18:20 |
ghostmansd | I understand you have a lot to do besides that. | 18:20 |
ghostmansd | So I discovered the reply on my own. | 18:20 |
ghostmansd | Please read the thread before replying, otherwise it just wastes your time. | 18:22 |
ghostmansd | And wastes mine too. | 18:22 |
ghostmansd | The reply is: yes there can be different extras for the same operand. Example is rlwimi instruction, probably others. | 18:23 |
ghostmansd | 20,SHIFT_ROT,OP_RLC,RA,CONST_SH32,RS,RA,NONE,CR0,0,0,ZERO,0,NONE,0,0,0,0,1,0,RC_ONLY,0,0,rlwimi,M, | 18:23 |
ghostmansd | Or, well, the correct is "not different extras", but rather same extra appearing twice on different indexes. | 18:24 |
ghostmansd | rlwimi,NORMAL,,1P,EXTRA3,NO,d:RA;d:CR0,s:RA,s:RS,0,RA,0,RS,RA,0,CR0,0 | 18:25 |
ghostmansd | d:RA leads to extra0, s:RA leads to extra1. | 18:26 |
ghostmansd | That was the original question. | 18:26 |
ghostmansd | And, by the way, this leads to failure: $(echo "sv.rlwimi 3, 1, 5, 20, 6" | SILENCELOG=true pysvp64asm) | 18:30 |
ghostmansd | Triggering the exact assertion error which checks for different extras. | 18:30 |
ghostmansd | I'm adding a test for this instruction into disassembly tests. | 18:31 |
ghostmansd | List of broken instructions is here: https://bugs.libre-soc.org/show_bug.cgi?id=1093#c2 | 18:42 |
ghostmansd | Raised a separate task: https://bugs.libre-soc.org/show_bug.cgi?id=1098 | 18:44 |
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octavius | I'll be about 10min late for the meeting today | 20:46 |
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programmerjake | submitted https://bugs.libre-soc.org/show_bug.cgi?id=1099 for 16-bit fp load/stores, didn't have time to add see-also/blocks yet | 21:03 |
programmerjake | i'll be a few min late | 21:04 |
lkcl | ghostmansd, so sorry massive headache | 21:16 |
lkcl | ghostmansd, brilliant will talke a look | 21:17 |
ghostmansd | that's OK, np | 21:17 |
ghostmansd | do we have a meeting today? | 21:17 |
ghostmansd | I've been thinking of finally participating :-) | 21:17 |
lkcl | good idea to put in test_pysvp64dis.py | 21:18 |
ghostmansd | I'm refactoring extras to simplify the visitor idea and fix RA0/RT0 issues | 21:18 |
ghostmansd | so please don't touch these places now | 21:19 |
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programmerjake | lkcl, thx for adding see-alsos! | 22:40 |
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lkcl | always needed otherwise the bugs get lost as noise | 22:46 |
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