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| openpowerbot | [irc] <lkcl> markos: just saw what you wrote on sunday about litex. the issue is that what they have done is both sub-par, extremely fragile and difficult to work with. | 10:19 |
|---|---|---|
| openpowerbot | [irc] <lkcl> the codebase contains dozens of occurrences of idential class names, using wildcard imports as standard makes resolution of which class is actually imported literally impossible to ascertain | 10:20 |
| openpowerbot | [irc] <lkcl> and the class inheritance hierarchy is often six to eight levels deep, with "class Factory" techniques (dynamic runtime class instantiation) that again make it virtually impossible to navigate | 10:21 |
| openpowerbot | [irc] <lkcl> on top of that the actual output, because it uses migen, is both non-deterministic, horribly inefficient, and occasionally non-synthesiseable | 10:22 |
| markos_ | I'm not saying to use litex itself -though I wouldn't rule it if it came to that- I'm just saying to see what they do to make DDR3 work | 10:23 |
| openpowerbot | [irc] <lkcl> that's what gram is. it's a port of litedram to nmigen. | 10:24 |
| markos_ | get inspiration from the tricks used there, or even borrow the tricks | 10:24 |
| openpowerbot | [irc] <lkcl> no we don't need to "borrow" - gram is *literally* a direct near-line-for-line port *of* litex litedram | 10:24 |
| openpowerbot | [irc] <lkcl> the issue we detected - and this is all documented from 18 months ago on NGI POINTER - was that the ECP5 PLL comes up in an unstable state | 10:25 |
| markos_ | well, then we must put more effort there, imho, focusing on making hyperram is suboptimal, we should put effort in gram then | 10:25 |
| openpowerbot | [irc] <lkcl> you have no idea if it phase-locked at 0 degrees, 90 degrees, 180 degrees or 270 degrees. | 10:25 |
| openpowerbot | [irc] <lkcl> i spent literally months on it | 10:25 |
| openpowerbot | [irc] <lkcl> tobias has literally spent months on it | 10:25 |
| markos_ | no point in getting an expensive fpga with eg 1GB of RAM only to ignore it for hyperram | 10:26 |
| openpowerbot | [irc] <lkcl> i can tell you right now it'll be several months of work | 10:26 |
| markos_ | great | 10:26 |
| openpowerbot | [irc] <lkcl> porting of the Xilinx PLL code from litex to ls2 will be the first order of business | 10:27 |
| openpowerbot | [irc] <lkcl> (for the DDR side: there already exists "basic" PLL code for ls2 for the XC7 series FPGAs) | 10:27 |
| markos_ | it has become apparent that focusing on an fpga implementation is top priority right now | 10:27 |
| openpowerbot | [irc] <lkcl> the DDR side is a lot more involved | 10:27 |
| markos_ | might as well go all the way | 10:28 |
| openpowerbot | [irc] <lkcl> then the list of sub-tasks needed needs to be walked through in full detail | 10:28 |
| openpowerbot | [irc] <lkcl> and a grant written up | 10:28 |
| markos_ | I don't disagree at all | 10:28 |
| openpowerbot | [irc] <lkcl> whereby in *five months time* that work can begin (because RFPs can be put in) | 10:29 |
| openpowerbot | [irc] <lkcl> basically every new idea of what is needed is on a *minimum* five month delay, from conception of the idea to *beginning* that work | 10:29 |
| markos_ | all this came to me because I saw that the vexriscv apparently works with ddr3 and thought "wait, why can they do it and we cannot?" | 10:30 |
| openpowerbot | [irc] <lkcl> because the size of the vexrisc core is under 25% of an ECP5-85k / Arty-A7-100t | 10:31 |
| markos_ | microwatt is also small | 10:31 |
| markos_ | maybe not as small | 10:31 |
| openpowerbot | [irc] <lkcl> whereas Microwatt and Libre-SOC are both pushing 50% | 10:31 |
| openpowerbot | [irc] <lkcl> ohhh no it isn't | 10:31 |
| openpowerbot | [irc] <lkcl> microwatt most definitely is *not* small. | 10:32 |
| openpowerbot | [irc] <lkcl> this was one of the primary reasons why LibreBMC had such huge difficulties | 10:32 |
| markos_ | well, I have a a7-200t so it's the same percentage | 10:32 |
| openpowerbot | [irc] <lkcl> you'll find that the max clock rate goes down massively (discussed why last week) | 10:33 |
| openpowerbot | [irc] <lkcl> HyperRAM is far, far simpler. it's *literally* 150 lines of HDL | 10:33 |
| openpowerbot | [irc] <lkcl> whereas DDR is several thousand, getting on for 10,000 or greater | 10:34 |
| markos_ | I'm not disagreeing on the technical difficulties, I'm just saying we should do a) investigate and conclude that DDR3 will *never* be achieved on our FPGA boards, b) find FPGA boards that we can actually use | 10:34 |
| openpowerbot | [irc] <lkcl> DRAM controllers and PHYs take up appx 20-25k LUTs all on their own. | 10:34 |
| markos_ | because booting anything useful on hyperram alone is going to be much much harder as we progress | 10:35 |
| markos_ | forget a real OS | 10:35 |
| openpowerbot | [irc] <lkcl> normally with Vivado you get a "macro that solves it all". | 10:35 |
| openpowerbot | [irc] <lkcl> we discussed this last week | 10:35 |
| markos_ | we've actually been discussing this for months | 10:35 |
| openpowerbot | [irc] <lkcl> i spoke to Michiel and he's suggested a route by which we can be sponsored to use much larger HyperRAM ICs | 10:36 |
| openpowerbot | [irc] <lkcl> they're something mad like EUR 17 each and we need *eight* of them. that will get us... 512 mbytes of accessible RAM. | 10:36 |
| markos_ | that's 64MB | 10:37 |
| markos_ | which is still tiny | 10:37 |
| markos_ | barely enough | 10:37 |
| openpowerbot | [irc] <lkcl> no i said 512 megaBYTES | 10:37 |
| openpowerbot | [irc] <lkcl> not 512 megaBITS | 10:37 |
| markos_ | ah ok | 10:37 |
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| markos_ | ok still | 10:37 |
| markos_ | that actually derails us from our goal, we should not care about building our own hypermod modules | 10:38 |
| openpowerbot | [irc] <lkcl> the 512 mega*BIT* HyperRAM ICs are an insane EUR 17. QTY 8of on 2x PMODs | 10:38 |
| openpowerbot | [irc] <lkcl> it's around EUR 5,000 - 7,000 for the manufacturing / components cost. | 10:38 |
| markos_ | I mean it's a nice hw pet project if someone wants to make it happen | 10:38 |
| openpowerbot | [irc] <lkcl> which compared to buying *everyone* new FPGA boards with 200k LUTs is a hell of a lot less | 10:38 |
| markos_ | no it's not, 200k luts boards are about 500eur | 10:39 |
| openpowerbot | [irc] <lkcl> plus the cost of getting gram finished | 10:39 |
| markos_ | probably less if you get barebones boares from aliexpress, around 180e | 10:39 |
| openpowerbot | [irc] <lkcl> plus the cost of porting that 200k LUT board to nmigen-boards | 10:39 |
| markos_ | but gram will enable ddr3 on *every* similar and future board not just the current | 10:39 |
| openpowerbot | [irc] <lkcl> no, it will enable ddr3 on every *tested* board, for which there will also be a task needed with its own budget | 10:40 |
| markos_ | I mean it's not unreasonable to assume that enabling eg. arty a7 100t board will only require minimal effort to enable nexys video as well | 10:40 |
| openpowerbot | [irc] <lkcl> but the kicker is that Michiel suggested - and i agree with him - that the upgraded HyperRAM PMODs be made available via one of NLnet's existing funded projects on their crowd-funding platform | 10:41 |
| openpowerbot | [irc] <lkcl> for sale to other people | 10:41 |
| markos_ | what I mean is that the major effort/cost is going to be on a single board | 10:41 |
| openpowerbot | [irc] <lkcl> which helps bring the cost down | 10:41 |
| markos_ | well that's different | 10:41 |
| openpowerbot | [irc] <lkcl> no, unfortunately, it's not reasonable at all to make that assumption. | 10:41 |
| openpowerbot | [irc] <lkcl> remember i have done *four* FPGA porting efforts for ls2 | 10:42 |
| markos_ | but none on a sufficiently large fpga | 10:42 |
| openpowerbot | [irc] <lkcl> VERSA_ECP5, ULX3S, Arty-A7-100t, Kestrel-ECP5, and i think there was one more | 10:42 |
| markos_ | perhaps you were limited all the time by the size of your fpgas | 10:42 |
| markos_ | you just said so yourself | 10:42 |
| markos_ | so what if trying on a larger fpga just magically works? | 10:43 |
| openpowerbot | [irc] <lkcl> it *never* "magically works" - it only "magically works" if you utilise the proprietary Xilinx tools | 10:43 |
| markos_ | in any case, I'm not against hyperram pmods | 10:43 |
| markos_ | but I don't want to depend on them and ignore onboard memory | 10:44 |
| openpowerbot | [irc] <lkcl> because they spend vast sums of money on their software dev-teams making sure that the "wizard tools" are properly integrated and "just work" | 10:44 |
| openpowerbot | [irc] <lkcl> i didn't want to, either | 10:44 |
| markos_ | if they depend on proprietary xilinx tools, so be it, we report the bugs upstream and help the developers fix the problems | 10:44 |
| openpowerbot | [irc] <lkcl> then i learned that the larger the FPGAs the slower the top clock rate | 10:44 |
| markos_ | we are not upstream for every project we use | 10:45 |
| openpowerbot | [irc] <lkcl> we're a *Libre* project not an "Open" project. | 10:45 |
| markos_ | I know | 10:45 |
| openpowerbot | [irc] <lkcl> use of proprietary tools - particularly given that we're funded by NLnet - is prohibited | 10:45 |
| openpowerbot | [irc] <lkcl> or: we can use them, but don't expect to get any future grants | 10:45 |
| markos_ | no, but we can get 'inspiration' by them -the proprietary tools that is | 10:46 |
| openpowerbot | [irc] <lkcl> when you run Vivado or Lattice Diamond, not kidding your heart will sink at the yawning chasm between those proprietary tools and where FOSSHW-FPGA tools are, right now | 10:47 |
| markos_ | no doubt | 10:47 |
| markos_ | anyway, I think I've made my point, I think we should put more effort in direct ddr3 support, be it gram or litex or whatever | 10:48 |
| openpowerbot | [irc] <lkcl> the amount of money they've spent, particularly on the Graphical "Design Wizards", is astonishing | 10:48 |
| markos_ | I was looking at the prices of 200k luts fpgas and they're not at all unreasonable, about 500eur and come with 1GB RAM | 10:48 |
| openpowerbot | [irc] <lkcl> my estimates put that at about 8-12 months from start to *possible* success | 10:48 |
| openpowerbot | [irc] <sadoon[m]1> Good to hear about those PMOD HyperRAM chips being potentially available to us, will help a lot | 10:48 |
| markos_ | which would just be wasted with hyperram | 10:48 |
| openpowerbot | [irc] <lkcl> sadoon[m]1, it requires some responses from other NLnet projects | 10:49 |
| openpowerbot | [irc] <sadoon[m]1> let's hope it works out then | 10:49 |
| openpowerbot | [irc] <sadoon[m]1> The core is going to be slow anyways, max 50MHz or so, it doesn't hurt if we have slow RAM | 10:50 |
| openpowerbot | [irc] <lkcl> the person i originally asked is near-reclusive. | 10:50 |
| openpowerbot | [irc] <lkcl> the core is going to be maximum 8-10 mhz on an Arty-A7-100t | 10:51 |
| openpowerbot | [irc] <sadoon[m]1> And the ECP5? | 10:51 |
| openpowerbot | [irc] <lkcl> last time i ran it (12+ months ago) timing was around... 12 mhz | 10:51 |
| openpowerbot | [irc] <lkcl> ECP5-85k it was... barely... 20 mhz? i can't remember. | 10:52 |
| openpowerbot | [irc] <sadoon[m]1> Luke I'll gladly take anything 1MHz and above hehehe | 10:52 |
| openpowerbot | [irc] <lkcl> remember that TestIssuer is below 0.1 IPC (1 instruction every *10* clock cycles) | 10:52 |
| openpowerbot | [irc] <sadoon[m]1> If it's good enough for testing it's good enough period | 10:52 |
| openpowerbot | [irc] <lkcl> it's similar to picorv32 as a design concept | 10:53 |
| openpowerbot | [irc] <lkcl> sadoon[m]1, i'm going to put some notes on the debian-sffs bugreport so they're not forgotten | 10:53 |
| openpowerbot | [irc] <sadoon[m]1> Sure, I also have some things to discuss tonight in the meeting | 10:54 |
| openpowerbot | [irc] <lkcl> oh where's the rootfs for debian? | 10:55 |
| openpowerbot | [irc] <lkcl> i need to drop it into ftp.libre-soc.org | 10:56 |
| openpowerbot | [irc] <lkcl> oo that looks like quite a lot of sophisticated work on the devscripts. | 10:59 |
| openpowerbot | [irc] <lkcl> but can you please use \ or envvar += i.e. stick to 80 chars per line! | 11:00 |
| openpowerbot | [irc] <lkcl> +LIST=(adduser apt apt-utils base-files base-passwd bash bc bsdutils coreutils c | 11:00 |
| openpowerbot | [irc] <lkcl> pio cron cron-daemon-commo | 11:00 |
| openpowerbot | [irc] <lkcl> likewise +APPEND CFLAGS -mcpu=power9 -mno-altivec -mno-vsx -mno-crypto -mno-htm -mlong-do | 11:01 |
| openpowerbot | [irc] <lkcl> uble-64 | 11:01 |
| openpowerbot | [irc] <lkcl> https://ftp.libre-soc.org/2023-08-29_11-01.png | 11:03 |
| openpowerbot | [irc] <lkcl> see the line-wrap on the diff on that xterm? | 11:03 |
| openpowerbot | [irc] <lkcl> rapid review is *extremely* hard on the eyes/brain when line-wrap occurs, and i can't cope (and you *need* me to be able to cope) | 11:04 |
| openpowerbot | [irc] <lkcl> ok am off again. put the comments in the debian-sffs bugreport, so it's not forgotten a simple pragmatic way forward. | 11:07 |
| openpowerbot | [irc] <sadoon[m]1> Wait did I not send the rootfs already? | 11:34 |
| openpowerbot | [irc] <sadoon[m]1> <lkcl> "oo that looks like quite a lot..." <- Thanks that made my day :) | 11:35 |
| openpowerbot | [irc] <sadoon[m]1> <lkcl> "but can you please use \ or..." <- Sure | 11:35 |
| openpowerbot | [irc] <sadoon[m]1> Will get it done before the meeting, need to prepare an older laptop for my job | 11:35 |
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| openpowerbot | [irc] <sadoon[m]1> Considering adding the VSX instructions into the script itself but I'm not sure, right now it's a text file | 17:55 |
| openpowerbot | [irc] <sadoon[m]1> fixed the line widths, under same branch | 17:56 |
| openpowerbot | [irc] <sadoon[m]1> <lkcl> "oh where's the rootfs for debian..." <- https://albader.co/debian-sffs.tar | 17:57 |
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| markos_ | do we have a password for the meeting? | 19:57 |
| markos_ | jitsi is playing funny | 19:59 |
| markos_ | it asked me for a password in the beginning, I reloaded the page and now all is good... | 19:59 |
| markos_ | weird | 19:59 |
| octavius | I noticed this change to Jitsi last week. Doesn't seem to be required everytime though | 20:10 |
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| ghostmansd | Hi folks, I did some statements regarding task 979: https://bugs.libre-soc.org/show_bug.cgi?id=979#c2 | 20:12 |
| ghostmansd | If we all agree on the overall structure, I suggest to create a new repository: svp64dis. This will contain the project I described. lkcl, programmerjake, could you, please, grant me a permission to create a new repository called svp64dis? | 20:16 |
| ghostmansd | Or, better, just svp64. | 20:17 |
| ghostmansd | Because we might (and likely will) opt to re-use the same opcodes table for assembly or other purposes whenever the need arises. | 20:17 |
| ghostmansd | Yes, just https://git.libre-soc.org/?p=svp64.git, or https://git.libre-soc.org/?p=libsvp64.git. So that folks could just do -lsvp64 and be happy. | 20:18 |
| ghostmansd | Ideas for better names are welcome. -libresoc looks fantastic too. | 20:19 |
| markos_ | ghostmansd, you could ask on the meeting right now :) | 20:20 |
| ghostmansd | Ah right, I always miss these | 20:36 |
| ghostmansd | Is it still going? | 20:36 |
| ghostmansd | I'll be muted though, the whole family sleeps :-) | 20:36 |
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| openpowerbot | [irc] <sadoon[m]1> https://www.issi.com/US/product-serial-sram-and-serial-ram.shtml | 20:59 |
| openpowerbot | [irc] <sadoon[m]1> https://github.com/stffrdhrn/sdram-controller There's also this | 21:07 |
| ghostmansd | lol, only after the meeting I realized I've never asked the question on naming :-) | 21:59 |
| ghostmansd | OK, IRC history's here for anyone interested :-) | 22:00 |
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