| cesar[m]2 | Maybe of interest: OpenHW Group and Mitacs announce a $22.5M research program for open-source processors. | 10:40 |
|---|---|---|
| cesar[m]2 | https://www.openhwgroup.org/news/2021/03/09/openhw-group-and-mitacs-announce-openhw-accelerate/ | 10:40 |
| cesar[m]2 | The whole organization seems RISC-V centered, though. | 10:46 |
| lkcl_ | nice! | 10:58 |
| lkcl_ | oh dear :) | 10:59 |
| lkcl_ | ah it's the ariane core | 11:00 |
| lkcl_ | https://github.com/openhwgroup/core-v-cores | 11:00 |
| lkcl_ | cesar[m]2: just sorting out 7-bit detection of RA_IS_ZERO | 11:01 |
| lkcl_ | i think we do predication, next | 11:01 |
| lkcl_ | (simultaneously with LD/ST but hey) | 11:01 |
| lkcl_ | can you take a look at decoding the SVP64.RM modes enough to detect the predicates? | 11:02 |
| lkcl_ | sorry, i mean the CR/INT predication fields | 11:03 |
| lkcl_ | i put this in place to detect/decode the modes | 11:03 |
| lkcl_ | https://git.libre-soc.org/?p=soc.git;a=blob;f=src/soc/decoder/power_svp64_rm.py;hb=HEAD | 11:03 |
| lkcl_ | but it is not in use yet, also not yet matched up with these | 11:05 |
| lkcl_ | https://git.libre-soc.org/?p=soc.git;a=blob;f=src/soc/decoder/power_enums.py;h=1254534d41aaa3e5ece31c8f2bafa21229f035f9;hb=2a77b489fee86c159214e5c0a33a2a2ce386eb82#l146 | 11:05 |
| cesar[m]2 | Sure, I'll take a look. | 11:06 |
| lkcl_ | star. | 11:06 |
| lkcl_ | i will need to do ISACaller first, but i need PowerDecoder2 to recognise the RM.Modes (power_enums.SVP64RMMode) first | 11:08 |
| lkcl_ | btw you'll see i made SVP64 optional in PowerDecoder2 | 11:08 |
| cesar[m]2 | By the way, I finally booted the tablet yesterday. A factory reset did it. Now, to restore the application data from backup. | 11:14 |
| lkcl_ | hooray! | 11:23 |
| lkcl_ | hmm PowerDecoder2 is not picking up RS properly | 11:35 |
| lkcl_ | ahh because on ST it's a source register and i have it qualified as a dest | 11:36 |
| lkcl_ | DOH! | 11:36 |
| lkcl_ | hoo-rah | 11:44 |
| lkcl_ | cesar[m]2: found a bug. need to check *both* no_in_vec and no_out_vec for LD/ST (which is twin predicated) | 11:50 |
| lkcl_ | i'll work that out | 11:54 |
| programmerjake | lkcl_: so, for adding setvl to the csv files, add it to major.csv, right? | 21:31 |
| programmerjake | Since I'm adding it to use from the c++ header generator rather than from the nmigen code, what values should I fill in for fields like `unit`, `internal op`, `sgl pipe`, etc.? | 21:32 |
| lkcl_ | major.csv is for opcodes that take up the entirety of the major opcode. | 21:35 |
| lkcl_ | b for example | 21:36 |
| programmerjake | well, you said to use opcode 22, nothing else uses that iirc | 21:38 |
| lkcl_ | in this particular case, it would be a minor_22.csv where we decide that bits 26..30 are XO | 21:38 |
| programmerjake | oh, ok | 21:38 |
| lkcl_ | correct... but we're not allocating the *entirety* of opcode 22 to it | 21:38 |
| lkcl_ | so it would be added to the subdecoders around here | 21:38 |
| lkcl_ | https://git.libre-soc.org/?p=soc.git;a=blob;f=src/soc/decoder/power_decoder.py;hb=HEAD#l558 | 21:38 |
| lkcl_ | where the "bitsel" argument would be .... ermm... 31-30 to 31-26 | 21:39 |
| programmerjake | so, copy minor_19.csv? | 21:39 |
| lkcl_ | bitsel=(1,5) | 21:39 |
| programmerjake | or would a different one be better? | 21:39 |
| lkcl_ | or minor_62.csv yes | 21:39 |
| lkcl_ | there's less to delete :) | 21:39 |
| lkcl_ | notable "things" about the CSV columns | 21:40 |
| lkcl_ | * RA_OR_ZERO is in the in1 column | 21:40 |
| lkcl_ | * RT_OR_ZERO will have to be in the out column | 21:41 |
| lkcl_ | (sigh i will have to add that capability) | 21:41 |
| programmerjake | we could just change the semantics to always write RT | 21:41 |
| lkcl_ | (done) | 21:42 |
| lkcl_ | that implicitly removes the ability of setvl to do setvli and setmvli | 21:42 |
| programmerjake | setvli was RA==0 right? | 21:43 |
| lkcl_ | setvli with RA==0 can also have RT==0 as well | 21:43 |
| lkcl_ | if it is desired not to have RT be updated with a copy of VL | 21:43 |
| programmerjake | yeah, but since R0 is treated as a temporary anyway, what's the point? | 21:44 |
| lkcl_ | it saves a write to the regfile | 21:44 |
| programmerjake | is saving a write more costly then adding additional logic since this is the only instruction where RT==0 means don't write? | 21:45 |
| lkcl_ | it's quite straightforward. the logic exists to already not have registers optionally write to the regfile | 21:45 |
| lkcl_ | including CRs, XER bits and so on | 21:46 |
| programmerjake | k | 21:46 |
| lkcl_ | the other column is the Rc one, which will need to be set to... CR0 | 21:46 |
| lkcl_ | 1 sec... | 21:46 |
| programmerjake | so, are you adding setvl to the csvs, or should I? | 21:47 |
| lkcl_ | you do it | 21:47 |
| lkcl_ | i'll check it | 21:47 |
| programmerjake | k | 21:47 |
| programmerjake | what XO should I use? 0? | 21:47 |
| lkcl_ | yeah :) | 21:47 |
| lkcl_ | just... bcoz :) | 21:48 |
| lkcl_ | 19's a good one to start from | 21:48 |
| lkcl_ | https://git.libre-soc.org/?p=libreriscv.git;a=blob;f=openpower/isatables/minor_19.csv;hb=HEAD | 21:48 |
| lkcl_ | oh, err maybe not | 21:48 |
| lkcl_ | there's no RA RB RC and no CR0 | 21:48 |
| lkcl_ | ah! | 21:49 |
| lkcl_ | https://git.libre-soc.org/?p=libreriscv.git;a=blob;f=openpower/isatables/minor_30.csv;hb=HEAD | 21:49 |
| lkcl_ | yes. | 21:49 |
| lkcl_ | that one. | 21:49 |
| * lkcl_ just added OP_SETVL | 21:50 | |
| lkcl_ | MicrOp.OP_SETVL | 21:51 |
| lkcl_ | that goes in column... 3 | 21:51 |
| lkcl_ | Function.SV is already there | 21:51 |
| lkcl_ | so "SV" goes in column 2 | 21:51 |
| lkcl_ | "CR out" will be CR0 | 21:52 |
| lkcl_ | "rc" column will be RC | 21:52 |
| * programmerjake < https://matrix.org/_matrix/media/r0/download/matrix.org/rmQAhsfpKmOclNLHQEMcUhYJ/message.txt > | 21:52 | |
| programmerjake | +opcode,unit,internal op,in1,in2,in3,out,CR in,CR out,inv A,inv out,cry in,cry out,ldst len,BR,sgn ext,upd,rsrv,32b,sgn,rc,lk,sgl pipe,comment,form | 21:53 |
| programmerjake | +0,SV,OP_SETVL,RA_OR_ZERO,CONST_SVI,NONE,RT_OR_ZERO,NONE,CR0,0,0,ZERO,0,NONE,0,0,0,0,0,0,RC,0,1,setvl,SVL | 21:53 |
| lkcl_ | oo that was too log | 21:53 |
| lkcl_ | ah better | 21:53 |
| programmerjake | look good? | 21:54 |
| lkcl_ | better 0b00000 for the first column. Function (2nd) is VL, CONST_SVI should be None | 21:54 |
| lkcl_ | RC,0,1,setvl,SVL | 21:54 |
| lkcl_ | that "1" should be "0" towards the end | 21:54 |
| lkcl_ | i have no idea what the "sgl pipe" field is in microwatt :) | 21:55 |
| lkcl_ | i left it in | 21:55 |
| programmerjake | so, sgl pipe just gets filled with whatever? | 21:55 |
| lkcl_ | 0,VL,OP_SETVL,RA_OR_ZERO,NONE,NONE,RT_OR_ZERO,NONE,CR0,0,0,ZERO,0,NONE,0,0,0,0,0,0,RC,0,0,setvl,SVL | 21:56 |
| lkcl_ | totally ignored, yeah :) | 21:56 |
| lkcl_ | i left it in, just in case the microwatt team ever want to use the same csv files | 21:56 |
| programmerjake | +opcode,unit,internal op,in1,in2,in3,out,CR in,CR out,inv A,inv out,cry in,cry out,ldst len,BR,sgn ext,upd,rsrv,32b,sgn,rc,lk,sgl pipe,comment,form | 21:56 |
| programmerjake | +0b00000,VL,OP_SETVL,RA_OR_ZERO,NONE,NONE,RT_OR_ZERO,NONE,CR0,0,0,ZERO,0,NONE,0,0,0,0,0,0,RC,0,0,setvl,SVL | 21:56 |
| lkcl_ | perfect | 21:56 |
| lkcl_ | that shouuuld work fine | 21:57 |
| lkcl_ | of course darn it binutils won't recognise this at all *sigh* so SVP64Asm will have to recognise it and perform a conversion to .long *sigh* | 21:57 |
| programmerjake | oh, the code I already have does the conversion manually, since when we emit the C++ header file, the registers aren't known, so they have to be substituted into the assembly text by gcc, then the assembler does the math in the argument to the .long | 21:59 |
| lkcl_ | you should be able to execute decoder/power_decoder.py and have it parse successfully and generate decoder.il | 21:59 |
| programmerjake | pushed | 21:59 |
| lkcl_ | nice | 21:59 |
| lkcl_ | ok let's try it | 21:59 |
| programmerjake | you'll probably have to update the submodule, since I just pushed the wiki, not soc | 22:00 |
| lkcl_ | do you want to add it to power_decoder.py just to be able to say "i did"? :) | 22:00 |
| programmerjake | idk, whatever you like | 22:00 |
| lkcl_ | go for it. it's 22:00 here i'm kinda winding down | 22:01 |
| programmerjake | k | 22:01 |
| programmerjake | did you push your modifications to soc.git yet? | 22:01 |
| lkcl_ | yehyeh | 22:02 |
| lkcl_ | https://git.libre-soc.org/?p=soc.git;a=commitdiff;h=HEAD | 22:02 |
| programmerjake | also, in fields.txt, what's OPCD? the OpenPower spec calls that PO (primary opcode) | 22:02 |
| lkcl_ | yyeaah one version of the spec uses OPCD, another uses PO | 22:03 |
| lkcl_ | sigh | 22:03 |
| programmerjake | wait, which version uses OPCD? | 22:03 |
| programmerjake | I've only ever seen PO | 22:04 |
| lkcl_ | it might have been v2.07 | 22:04 |
| lkcl_ | it was a long time ago already :) | 22:04 |
| programmerjake | yup, it is v2.07B | 22:06 |
| programmerjake | I think we should do search/replace with PO since that's what the 3.x specs use | 22:06 |
| lkcl_ | deep breath on that one | 22:08 |
| lkcl_ | i can do it tomorrow | 22:08 |
| programmerjake | k, sounds good | 22:08 |
| programmerjake | to be clear, replace OPCD with PO | 22:09 |
| lkcl_ | ack | 22:09 |
| lkcl_ | lkcl@fizzy:~/src/libresoc/soc/src/soc$ grep -r OPCD | wc | 22:09 |
| lkcl_ | 820 7065 5940 | 22:09 |
| lkcl_ | *splutter* | 22:09 |
| lkcl_ | :) | 22:09 |
| lkcl_ | that's because i have a ton of files where something with OPCD in it has ended up in some compiled output | 22:10 |
| lkcl_ | .v, .il, litex verilator binaries (even!), gtkw and vcd files | 22:10 |
| programmerjake | sed -i 's/([^A-Z])OPCD([^A-Z])/\1PO \2/g' fields.text | 22:10 |
| lkcl_ | dang | 22:10 |
| lkcl_ | acep->declBus(c+3456,"sim test_issuer ti core dec_BRANCH dec all_OPCD", false,-1, 5,0); | 22:11 |
| lkcl_ | programmerjake: thx | 22:11 |
| lkcl_ | need to check all the unit tests to make sure it's not having some unintended effect | 22:12 |
| lkcl_ | hilariously it doesn't actually look like it's used in any nmigen code | 22:12 |
| lkcl_ | urrr | 22:12 |
| programmerjake | then delete the OPCD section in the list of fields to avoid redundant definitions | 22:12 |
| programmerjake | OPCD (0:5) | 22:12 |
| programmerjake | Primary opcode field. | 22:12 |
| programmerjake | Formats: all | 22:12 |
| lkcl_ | no, that would make it "not conformant to the spec" | 22:13 |
| lkcl_ | section 1.7 | 22:13 |
| programmerjake | umm, it still conforms to the spec since you renamed all ocurrences of OPCD to PO. | 22:13 |
| lkcl_ | 'ang on... | 22:13 |
| programmerjake | then you just delete the definition of OPCD | 22:13 |
| programmerjake | the v3.x specs don't even refer to OPCD iirc | 22:14 |
| lkcl_ | OPCD would have been renamed to PO in the later section | 22:14 |
| lkcl_ | OPCD (0:5) | 22:14 |
| lkcl_ | Primary opcode field. | 22:14 |
| lkcl_ | Formats: all | 22:14 |
| lkcl_ | becomes | 22:14 |
| lkcl_ | OP (0:5) | 22:14 |
| lkcl_ | which _is_ in there, just in a different location (alphabetical) | 22:15 |
| lkcl_ | i'll sort it tomorrow. | 22:15 |
| * programmerjake < https://matrix.org/_matrix/media/r0/download/matrix.org/KWKTAXKDMkhCOstprMPBDamd/message.txt > | 22:16 | |
| programmerjake | oh, wow, matrix really messed up the formatting, hope it looks ok on irc | 22:16 |
| lkcl_ | nope :) posts a link to matrix.org | 22:17 |
| lkcl_ | https://matrix.org/_matrix/media/r0/download/matrix.org/KWKTAXKDMkhCOstprMPBDamd/message.txt | 22:17 |
| programmerjake | oh, well | 22:18 |
| lkcl_ | :) | 22:18 |
| programmerjake | also, if you like you could access irc through matrix, that would allow you to see messages on your phone too, rather than having to go to your laptop | 22:19 |
| programmerjake | https://f-droid.org/packages/im.vector.app | 22:21 |
| lkcl_ | yeah i'm looking for an irc client through f-droid. first one i found, not so hot | 22:21 |
| programmerjake | fdroid's search doesn't work that well | 22:22 |
| * lkcl_ running down. need sofa, tea and toast :) | 22:22 | |
| programmerjake | using matrix's irc bridge: https://github.com/matrix-org/matrix-appservice-irc/wiki/Guide:-How-to-use-Matrix-to-participate-in-IRC-rooms | 22:23 |
| lxo | dominant mobile operating systems seem to hate irc. I sense a push for centralized IM platforms behind that. we need more GNU-running mobiles | 22:23 |
| programmerjake | matrix's nice in that you can host your matrix acct on your own server and it works just fine | 22:24 |
| lxo | *but* AFAIK its IRC bridge is centralized, and it keeps your password | 22:25 |
| programmerjake | yeah, but it's just as centralized as freenode is...you can always run your own irc bridge instance | 22:25 |
| programmerjake | source for matrix/irc bridge: https://github.com/matrix-org/matrix-appservice-irc | 22:27 |
| lxo | but then you depend on *two* centralized platforms, and might miss the fact that it's not your own synapse that's keeping your IRC password | 22:27 |
| lxo | OTOH, most people don't even bother running their own synapse, and just go through with the Google CAPTCHA that matrix.org requires | 22:28 |
| programmerjake | it does? I forgot | 22:29 |
| lxo | that's why we need more P2P IM. if people can decide not to install and run their own separate server, they probably won't | 22:29 |
| programmerjake | I'd guess that using the android app, you can bypass needing the captcha, though I havn't tried and could be wrong | 22:30 |
| lxo | I can't say that it does; I know that it did. I was shocked, because I'd encouraged my daughter to install it and set up an account, and it led her to the google captcha | 22:30 |
| lxo | that was with riot on android | 22:31 |
| programmerjake | ok, well, sorry about that... | 22:31 |
| lxo | she ended up setting up an account on the same server I used, libreplanetbr.org, but it sunset last month, so now I'm out of the matrix. that's supposed to be good, right? :-) | 22:32 |
| lxo | I co-ran that server, in the spirit of "no cloud but that we make for ourselves". I managed to move my diaspora and gnu social contacts, but I never used matrix seriously, so I didn't even realize I'd have to do something about it before the server went down | 22:35 |
| lxo | so now I don't have to ;-) | 22:36 |
| programmerjake | lkcl_: added subdecoder and missing Function.VL | 22:54 |
| lkcl_ | ah! doh, column 2 in minor_22.csv was supposed to be the "SV" pipeline. doh :) | 23:16 |
| * lkcl_ just running a couple of quick tests | 23:18 | |
| lkcl_ | yosys "show dec22" on decode.il looks great | 23:18 |
| lkcl_ | quick test_issuer_svp64.py works... | 23:18 |
| * lkcl_ running the longer test_issuer.py... | 23:18 | |
| lkcl_ | looks great jacob. test_issuer.py is gonna be a while :) | 23:20 |
| programmerjake | k, assuming you removed Function.VL then | 23:41 |
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