Thursday, 2021-04-15

lkclChips4Makers, VERSA_ECP5 FPGA jtag tap interface over 4 GPIO pins (i.e. not via the FT232 connected to the *FPGA's* JTAG port) confirmed working15:10
lkclat least, it responded with an idscan15:10
Chips4MakersVvvery good.15:28
lkclusing an FT232 dongle in bit-banging mode at only 5kbaud it "worked", yet it still caused the other USB-UART to go offline :)15:45
Chips4MakersWhen I test the Retro-uC on FPGA I typically mapped the JTAG pins to PMOD header. I then used a buspirate with OpenOCD to access the JTAG interface. It should work with any hardware device for which there is an OpenOCD driver.19:57

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