| lkcl | gaah that's a mess but it's functional | 00:08 |
|---|---|---|
| lkcl | kylel, got it "working" | 00:09 |
| kylel | now there's a vote of confidence I can get behind | 00:13 |
| kylel | thank you for that effort, I had to imagine that was messy | 00:14 |
| *** kylel1 is now known as kylel | 02:37 | |
| lkcl | kylel, it was... unexpected, shall we say | 15:00 |
| lkcl | another thing that "emerges" :) | 15:01 |
| lkcl | test_caller_shift_rot.py run_tst_program basically should become part of the (planned) base class that all unit tests use | 15:02 |
| lkcl | or | 15:02 |
| lkcl | more to the point | 15:02 |
| lkcl | split completely out so that test cases are "accumulated" in the exact same way they are for HDL | 15:03 |
| lkcl | like this | 15:03 |
| lkcl | https://git.libre-soc.org/?p=openpower-isa.git;a=blob;f=src/openpower/test/alu/alu_cases.py;hb=HEAD | 15:03 |
| lkcl | every single one of those *should* have an "ExpectedState" | 15:04 |
| lkcl | but it's ok if they don't: to be meaningful they simply have to be run against 2 "things" | 15:04 |
| lkcl | but the idea is that those test cases which *do* have ExpectedState | 15:04 |
| lkcl | look *EXACTLY* like alu_cases.py | 15:05 |
| lkcl | and consequently can compare against *THREE* things | 15:05 |
| lkcl | 1) the ISACaller simulator | 15:05 |
| lkcl | 2) the HDL | 15:05 |
| lkcl | 3) *the ExpectedState()* | 15:05 |
| lkcl | so that's our goal | 15:05 |
| lkcl | to split out the test_caller_shift_rot.py test cases into a base class and "cases", to look *exactly* like alu_cases.py | 15:06 |
| lkcl | an intermediary goal is to add, to one (and only one, for now) of alu_cases.py, an ExpectedState() | 15:07 |
| lkcl | then to allow that to "work its way down" to test_core.py's check_regs() | 15:07 |
| lkcl | and that dict testdic would become | 15:08 |
| lkcl | testdic = {'sim: sim, 'hdl': core, 'expected': expectedresults} | 15:08 |
| lkcl | and, ta-daaa, we have a useful API :) | 15:09 |
| kylel | so basically add an optional expected for add_case and then in check_regs choose the proper dict? | 15:19 |
| lkcl | kylel, https://bugs.libre-soc.org/show_bug.cgi?id=686#c51 | 16:13 |
| lkcl | you were off for a while :) | 16:13 |
| lkcl | yes. | 16:13 |
| lkcl | i explained it in the bugreport | 16:13 |
| lkcl | it should be straightforward and much easier to do than the non-HDL case | 16:14 |
| kylel | famous last words :) | 16:19 |
| kylel | I was thinking about expected and TestCase earlier | 16:20 |
| kylel | would it be too simple or naive to think to just check in TestCase if to_test is expected and basically skip past the creation part leaving it basically as is? that way it would basically fly through the check_regs in test_core | 16:22 |
| lkcl | oh, err... hmmm | 17:22 |
| lkcl | like, be ignored | 17:22 |
| lkcl | unless called at the end | 17:22 |
| lkcl | oh, i know: have an argument to check_regs which allows it to be skipped | 17:23 |
| lkcl | btw, deep breath: we need to work out how to run arbitrary "things", independently | 17:23 |
| lkcl | now, at the moment, they are run side-by-side | 17:24 |
| lkcl | but | 17:24 |
| lkcl | trying to run multiple simultaneous generators, this will be COMPLETELY mental :) | 17:24 |
| lkcl | so one option is to do them *one at a time* | 17:24 |
| lkcl | and to *accumulate* results... | 17:24 |
| lkcl | then *AFTERWARDS* run the comparison(s) | 17:24 |
| lkcl | otherwise we have to look at doing some sort of multi-threading nightmare | 17:25 |
| lkcl | my feeling is, running the HDL and accumulating "results", then doing the same thing for ISACaller, and the same for qemu, and ... etc. etc. | 17:59 |
| lkcl | this is the "sane" way to do it | 17:59 |
| programmerjake | well...if the stuff can be run in a different process and results piped or otherwise sent using interprocess communication, python does have all the async/await stuff needed to handle it all in parallel | 18:03 |
| programmerjake | alternatively rely on pytest-xdist to provide test parallelism and just run it all single-threaded/single-process (except calling qemu/gdb/etc.) | 18:06 |
| programmerjake | lkcl, tgx for handling #685 | 18:06 |
| programmerjake | thx* | 18:06 |
| *** acid115 <acid115!~s@2.31.237.29> has left #libre-soc | 18:23 | |
| lkcl | programmerjake, indeed it does... worked with it several times - i'm just slightly nervous about jumping straight to that style, as a first pass, if you know what i mean | 19:21 |
| lkcl | btw what do you think about tackling the PartitionedSignal integration to nmigen? there's a *lot* of budget allocated to it | 19:21 |
| lkcl | kylel, i'm going to have a go at hacking test_core.py to separate out HDL-result-generation from Sim-result-generation | 19:22 |
| lkcl | it occurs to me that now TestState exists it can be used (manually) to extract state. which is kinda cool. | 19:23 |
| lkcl | ahh wait... have to do memory-checking first | 19:23 |
| kylel | where's that taking place? | 19:36 |
| kylel | n/m just saw your comment | 19:38 |
| lkcl | :) | 19:40 |
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