Thursday, 2021-10-21

*** kylel1 is now known as kylel07:05
cesarlkcl: Regarding;a=blob;f=src/soc/simple/test/;h=8558303f730d48a6ae37ed2377dfe64ac5714c54;hb=HEAD#l20510:06
cesarIt seems to me it should be using DBGCtrl.STEP, not DBGCtrl.START. And doing it on every instruction, not just at the start.10:07
cesarSingle-stepping is currently done by synchronizing with an internal signal:;a=blob;f=src/soc/simple/test/;h=8558303f730d48a6ae37ed2377dfe64ac5714c54;hb=dd84c610a68a556eb532cee133df68c4354dbf32#l214 . It could be done via DMI instead.10:11
lkclyyeah i remember now.  yes that's kinda cheating :)10:11
lkclwhile not (yield self.issuer.insn_done)10:12
lkcli think the reason i did that is because i was concerned about the CPU usage (of the simulator) running for multiple cycles10:13
lkclyes, you are right, though: doing it "properly" would be STEP then a loop on reading get_dmi(DBGCore.STATUS) and checking if the "STOPPED" bit is set10:14
cesarI think it's worth it to implement this, at least it will be obvious if/when DMI STEP breaks again in the future.10:17
cesarI'll try and see if has much impact in Test Issuer running time.10:18
cesarCesar's first law of ASICs: features that aren't regularly tested before tape-out, will be shipped broken...10:27
lkclif both svp64 and non-svp64 test_issuer examples work it'll do fine.  and catch errors in future.10:44
lkclwe need both modes, Cesar10:44
lkclhmmm... no.10:44
lkclit's fine for now10:44
lkclthings get more complicated when we do in-order and OoO pipelines10:45
lkclbut the problem there is: single-stepping actually stops pipelines from having more than one "thing" in them at one time.10:45
lkclbut, we can deal with that later10:46
cesarI guess you don't really have to flush the pipelines on DMI STOP/START if you didn't actually modified any state (registers, PC, memory, etc.)11:10
cesar* DMI STOP/STEP11:11
cesar... modified via DMI itself, that is.11:16
lkclif you make modifications via DMI in the middle of a running system, although it is possible, it is not defined what will happen11:51
cesarI mean, if the core is stopped, and you make modifications, it needs to flush pupelines before starting again. Otherwise (no modifications made), you needn't.12:28
cesar* pipelines12:30
lkclif the core is stopped, it must *not* report "stopped" *until* the pipelines are entirely flushed.12:40
lkclwhen the pipelines still have work in them, it *must* report a status of "stopping", and *must* not report "stopped".12:41
lkclwhich is why the client/user of DMI must do "poll" of the DMI status register12:41
cesarWell, one can think of a stopped core as one that doesn't retire any new instructions. I submit that it doesn't mean it has to stop issuing and executing instructions, provided it is not architecturally visible.12:44
cesarI should really look on the DMI specification, to see whether it says something about it.12:47
lkclthere isn't one (or, there is, but it's for RISC-V)12:54
cesarIf my understanding is correct, an out-of-order core, when stopped, will fill its reorder buffer to capacity. If any state is changed, it could flush the reorder buffer, just as if a precise exception was raised at that point.12:54
lkclyes, agreed, it should not be architecturally visible...12:54
lkclbut that is an optimisation, and we're under enough time pressure as it is12:55
cesarOK, got it.12:55
lkclplus, it's an optimisation in a highly non-essential area: debugging you do not expect it to be fast.12:55
cesarJust that it allows single stepping an Out of Order core, while still exercising the parallelism.12:57
cesar(which is good for unit tests)12:57
lkclyyyeah i realise that.  i'm not sure how that should be handled.  it's exceedingly complex.13:07
lkcla way to "avoid" it is to let programs run to completion, and only check "final results" (expected results - as kylel implemented)13:08
*** mepy <mepy!~mepy@> has left #libre-soc14:12
lkcljust... wow. i was both hoping - and praying - that would work17:01
lkcli made an absolutely terrible hack to SimdSignal (actually the PartitionedCat submodule) to add a back-link to the submodule that the return result creates17:02
lkclthen detect it in SimdSignal Assign17:03
lkclwhich will call LHS.set_lhs_mode(True)17:03
lkcland RHS.set_lhs_mode(False)17:04
lkcland then the LHS knows not to do this17:04
lkcl+                        comb += self.output.sig.eq(Cat(*output)) # RHS mode17:04
lkclCat sorry knows not to do that17:04
lkclbut to do this instead17:04
lkcl+                    if self.is_lhs:17:04
lkcl+                        comb += Cat(*output).eq(self.output.sig) # LHS mode17:04
lkcland it actually frickin worked17:04
lkclthat's a big damn deal, which saves vast amounts of code-redesign17:06
lkclboth across the entirety of the ALUs *and* not having to throw away 6 months of work and start again.17:06
lkclso relieved17:06
lkclprogrammerjake, i know you don't like the version 1 code, because it doesn't have everything that could be needed, and you view what you are doing as better22:46
lkclreality is that things are being severely held up: the version 1 code needs to be completed so that the ALU conversion can be "unblocked"22:47
lkcland with 12 independent ALUs, we could theoretically have 12 people working on their conversion (those 12 people being held up by one)22:47
lkcli only just now understand the gate-level efficiency of what you designed, over a week later from when you initially wrote it, because there is something to "compare against"22:48
lkclif however you had helped with version 1.0, that understanding would have come far faster22:49
lkclbecause the version 1.0 code would have been completed, and you could have helped walk me through it22:49
lkcland other people could be working on ALU conversion whilst we were discussing that22:49
lkclplease please for goodness sake listen when the Project Manager, who is responsible for coordinating tasks and making sure that critical path work happens as quickly as possible, says that something non-essential such as optimisation needs to be shelved22:51
lkclso please, please, for goodness sake, can you complete #71622:52
lkclas it is described22:52
lkclthere are only 3 AST constructs left / needed (out of over 30) that are now blocking ALU conversion22:53
lkclif you do Slice and Part, i can concentrate on Switch22:53
lkclwhich is ridiculously convoluted on its own22:54

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