programmerjake | just saw: https://github.com/ossf/great-mfa-project | 00:13 |
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lkcl | uh-oh | 09:55 |
lkcl | we're google, we're github/microsoft, let us help you, the open source community, by becoming YOUR GOD as far as identity is concerned | 09:57 |
lkcl | you can trust us, we are the ultimate GOD and AUTHORITY of proof of identity | 09:58 |
octavius | "Don't be evil", right? It is interesting how companies develops very primitive, animalistic behaviour once their organisation becomes large enough. I guess the distance between responsibility and authority is increased | 11:18 |
lkcl | debian has this one solved. it's a SEVENTEEN stage process however that is considered quotes too complicated quotes | 14:00 |
lkcl | of couuurse we can do better, said npm, archlinux, node.js, pypi, nix, and half a dozen others | 14:01 |
tplaten | added a skeleton for test_loadstore1_ifetch_multi() | 16:03 |
tplaten | lkcl, had a look at your commits 104 min ago | 16:23 |
tplaten | I found some dead links on https://libre-soc.org/HDL_workflow/, im going to fix that | 17:30 |
octavius | Given that Debian has existed for as long as it did, they must've done a lot of things right | 17:56 |
tplaten | I get an error in libreriscv$ git push | 18:02 |
tplaten | FATAL: W any libreriscv tobias DENIED by fallthru | 18:02 |
octavius | Are you using this url gitolite3@git.libre-soc.org? | 18:07 |
tplaten | yes ssh://gitolite3@git.libre-riscv.org:922 | 18:30 |
tplaten | which redirects to libre-soc, the other urls there work | 18:31 |
octavius | Probably a permission issue then | 19:16 |
tplaten | maybe | 19:16 |
octavius | I remember asking several times for permissions for different repos | 19:17 |
octavius | Each one is separate from the others (probably for the best) | 19:17 |
*** tplaten <tplaten!~isengaara@55d487d6.access.ecotel.net> has left #libre-soc | 19:24 | |
lkcl | ah he's dropped off irc. probably the wiki git repo. | 19:35 |
lkcl | i had to remove everyone after a force-master-push | 19:35 |
octavius | So lkcl, this BS_SAMPLE and BS_EXTEST/BS_INTEST are really cool | 20:10 |
octavius | In BS_SAMPLE, the core and pad remain connected, thus setting the an input pad (such as UART rx), you'll see the signal propagate through to the core. | 20:12 |
octavius | In this case (as UART tx connected to rx), the JTAG will see both rx/tx pads as asserted | 20:12 |
octavius | Whereas the EXTEST/INTEST (they use the same address), actually disconnect the core/pad mux. So if UART rx pad is asserted, tx pad will NOT be asserted unless it is set via TDI | 20:13 |
octavius | The GTKWave show this pretty well (in the EXTEST case, you can see the core/pad connection break once the JTAG circuitry starts working | 20:14 |
lkcl | i know, it's pretty awesome, right? | 20:31 |
lkcl | being able to separate and independently test the entire ASIC's pads and its functions | 20:31 |
lkcl | so even if the pads are utterly broken, as long as the JTAG port is fine you can still test the functions | 20:32 |
lkcl | and even if the functions are utterly broken, you can still test the pads | 20:32 |
octavius | exactly! | 20:33 |
octavius | Is there a way to run the test within a test? For example, I'd like to run the GPIO test with the JTAG one, before I check the BS_SAMPLE data | 21:19 |
octavius | Or if not, make the JTAG test process wait until the GPIO test has been executed? | 21:19 |
lkcl | do a separate test_xxxx() function which gets called after the first | 21:45 |
lkcl | have a look at this to see how it's done | 21:48 |
lkcl | https://git.libre-soc.org/?p=soc.git;a=blob;f=src/soc/experiment/test/test_loadstore1.py;hb=HEAD | 21:48 |
lkcl | note a setup function which returns a thing (the dut) | 21:48 |
lkcl | followed by that setup function being called in multiple sequential tests | 21:48 |
lkcl | henriok, ping, trust all is well. we should do a wikipedia page update for Libre-SOC now that e.g. the NGI POINTER Grant is underway, for the second ASIC | 22:02 |
*** A_Dragon is now known as Festive_Dragon | 22:19 | |
octavius | Thanks, lkcl, I'll continue the test tomorrow. Before Tuesday I'd like to make as much progress as possible. Tuesday onwards I'll be preparing for my driving test, so will need all the concentration I can get :) | 22:26 |
lkcl | niice - yeah i have often gotten visually distracted, dreaming of PCB layouts in full colour, one of the very rare times i could recall colour (mostly i visualise black and white) | 22:58 |
lkcl | ya don't want lines of code scrolling across your visual cortex whilst trying to remember "Mirror Signal Mirror"... | 22:59 |
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