Friday, 2022-02-25

tplatenToday I tried Vulkan again, it does work on my Talos II if I use Debian SID (which I boot from an external SSD). I was able to start Godot4, which I had built yesterday.16:18
tplatenThe Godot thread is at,306.0.html16:45
tplatenWhen I run make in microwatt, I get core_tb.vhdl:19:5:error: port "bram_do" of mode IN must be connected17:47
lkcltplaten, you must use "make microwatt-verilator" only17:47
lkclyou can't use the microwatt-verilator branch to build anything other than FPGA_TARGET=verilator17:48
lkcli haven't done any integration in that branch with FPGAs17:48
lkclif you want to build *anything* other than microwatt-verilator you cannot ues the microwatt_verilator branch.17:49
lkcli haven't had time17:49
tplatenI agree, I test on master18:00
lkclbear in mind that, sigh, there is a bug in older versions of microwatt, with respect to the Wishbone Bus18:01
lkcli have some code as a workaround but it's hard to spot unless you know what to look for18:01
lkclWB addresses are supposed to be aligned.18:01
lkclif you have a 64-bit data bus and 8-bits of select lines, and you want to write to a byte, you:18:02
lkcl* take the address and shift it down by 3 bits (because 64-bit data ==> 8 bytes ==> 8=2^3 therefore knock the 3 LSBs off the WB address)18:02
lkcl* set the required "sel" bit to match the byte you want to write18:03
lkclmicrowatt disobeyed rule (1) and simply put the *entire* address - including the lower 3 LSBs - onto the wishbone bus18:03
lkclthat was consistent throughout the *entire* codebase!18:03
lkclso it looked like there wasn't a problem18:04
lkclbut when you *use* microwatt, you had to add 3 extra zeros on front of any addresses!18:04
lkclthat's now fixed in later versions18:04
tplatenI cloned microwatt today18:05
tplatenBut now, when I run make microwatt.bit I get 11. Executing GHDL. error: missing value in generic override option18:05
lkclit's a really readable codebase, isn't it?18:05
lkclno idea about that18:05
lkclif you join #microwatt here on libera it gets bridged through to the openpower mattermost18:06
lkclwhat version of ghdl do you have?18:07
lkclt$ ghdl --version18:07
lkclGHDL 2.0.0-dev (1.0.0.r955.g263c843ed) [Dunoon edition]18:07
lkcl Compiled with GNAT Version: 9.3.018:07
tplatenI had a look at the Makefile, the error is coming from yosys with ghdl plugin18:11
lkcloh that sounds familiar, 1 sec18:12
tplatenYosys 0.14+42 (git sha1 158600004, clang 7.0.1-8+deb10u2 -fPIC -Os)18:12
lkcluse this commit commit c9b05e481423c55ffcbb818:12
lkclyep do not use the latest version of yosys, it is guaranteed not to work18:13
tplatenGHDL 2.0.0-dev (1.0.0.r995.g83a5f964) [Dunoon edition]18:13
lkcl$ yosys --version18:13
lkclYosys 0.13 (git sha1 8b1eafc3a,18:13
lkclyep version of ghdl is fine, you can't use the latest version of yosys.18:13
lkclor yosys-ghdl-plugin18:13
tplatenI agree, I make a backup, then downgrade to Yosys 0.1318:14
lkclit took a while to find those18:14
tplatenIn git clone there is no commit c9b05e481423c55ffcbb8, git log does not show that commit18:26
lkcli'm using this [remote "origin"]18:27
lkcl    url =
lkclactually probably this [remote "libresoc"]18:27
lkcl    url =
lkcl$ git branch18:28
lkcl* (HEAD detached at yosys-0.13)18:28
lkcl  ls18018:28
lkclit's a tag18:28
lkclyou _should_ be able to just do "git checkout yosys-0.13"18:28
tplatenI did a "git checkout yosys-0.13", it works18:33
lkclthat was a frickin quick compile btw :)18:34
tplatenUnrelated to libre-soc, Yesterday I was trying out Godot4 on my Talos II. It does work using Vulkan.18:36
tplatenI am using the fork from v-sekai.18:38
programmerjaketplaten nice! you already mentioned that you got vulkan working earlier.18:39
tplatenI did, once yesterday, and once today, before lkcl replied18:40
lkclholy cow i have verilator simulations returning data from the DDR3 "fake phy"18:45
lkclit's not the _right_ data but at least it's data :)18:45
lkclit means that the chip-select is the right way round for a start18:47
*** tplaten <tplaten!> has left #libre-soc18:53
lkclyeah it's a big deal19:48
lkclchip-select was inverted19:48
lkclin the ECPIX board it's clear that the chip-select wire has been hard-wired to zer019:48
lkclwoo i managed to get execution up to 60 mhz, that's new21:47
programmerjakethat's a whole 20% faster than my rv32 core!21:52
lkclwell it is still TestIssuer so only 0.1 to 0.15 IPC :)21:54
programmerjake:) i'd guess my rv32 core has an ipc around 0.7-0.9 -- branch takes 2 cycles, everything else takes 1 cycle iirc22:12
programmerjakeso...faster if all you care about is mhz22:13

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