Friday, 2022-03-04

programmerjakeas I mentioned on the github issue, I got microwatt to work now, thanks msh for all the heavy lifting!04:56
mshprogrammerjake: it works with litedram too and with linux on the usb uart - just the litedram boot code is set to use uart0 rather than the usb uart. I'll reply in github with more details04:59
programmerjakeI ported my 3D maze game from my rv32 core to microwatt on the OrangeCrab:
programmerjakeI added a screenshot:
programmerjakelkcl if you let me write to libre-soc's microwatt.git, I can push my branch there too.12:11
programmerjakeoh, btw, thx msh for writing out how to run linux on microwatt! i'll try that out soon, maybe next week12:37
mshprogrammerjake: cool, be good to hear how it goes. if you hit memtest issues (some boards hit that?) there's a workaround telling the dram to use cl=7 rather than cl=6 timing. a bit of a bodge but seems to work.13:34
mshflash looking 3d maze, will give it a go some time13:35
lkclprogrammerjake, 1 sec13:56
lkclmsh, yay!13:56
lkclprogrammerjake, done14:00
lkclmsh: yeahh these DRAM ICs have a datasheet minimum speed of 200 mhz DDR (so a 100 mhz clock)14:02
lkclit turns out that manufacturing tolerances actually allow for around 48 to 55 mhz14:02
lkclbut you are reaaally pushing your luck :)14:02
lkclghostmansd[m], just going over the patches for binutils, they look pretty reasonable20:46
lkclas in, i recognise the similra morass of if-statements from when i did the python version :)20:47
lkclthis one's unfortunate;a=commitdiff;h=0313d112ed7d5dfaa3cec052b5c4519ef92966a620:51
lkcli wonder if there's a better way to do it, by adding a CSV column from sv_analysis.py20:52
ghostmansd[m]Yep. Some stuff still looks kinda different compared to Python, but for some parts I couldn't resist, especially those with callbacks.20:52
ghostmansd[m]We actually can substitute all is_wahtever stuff to "constants"20:53
ghostmansd[m]But I think this would be an overkill for now, also, this would occupy some bits20:53
lkcl+/* Opcode is only supported by SVP64 extensions (LibreSOC architecture).  */20:54
lkcl+#define PPC_OPCODE_SVP64        0x800000000000ull20:54
ghostmansd[m](not critical but, since we can deduce these anyway, why bother)20:54
lkclcan you make that "Draft SVP64 extensions"?20:54
lkclto make it clear to people it's not yet been submitted to the OPF ISA WG yet?20:54
ghostmansd[m]Maybe you also would like to rename -m switch?20:54
ghostmansd[m]We issue it by -mlibresoc20:55
lkclif we give the impression that we're over-and-above the OPF, we're in trouble :)20:55
ghostmansd[m]Exactly like they use -mpower920:55
lkclmmm i wondered about that, but a little free advertising never hurt anyone lol20:55
ghostmansd[m]Ok then :-)20:55
lkcli'm sure there should be a better way than using separate explicit string-matching against a bunch of mnemonics to identify LDs, STs, and Branches20:58
lkcloh btw at some point the Condition Register mnemonics need their own set, too20:58
lkclbut i haven't added any support for CR-based svp64 instructions at all, yet20:58
lkclin Power ISA 3.1 with 64-bit Prefixes, they have some bits which tell you:20:59
lkcl"this prefix is of type SLS"20:59
lkcl"this prefix is of type MLSS"20:59
lkcleach type can *only* be applied to certain instructions20:59
lkclwhich makes you think, "oink, that's totally redundant, wtf??"21:00
lkclbut then you realise, "ah. if you don't have those prefix-types, you have to do the same horrible trick we're doing with is-this-a-LD-operation, ..."21:00
lkclbut there isn't enough space, we need the entire 24-bits for SVP64, there's no room for a 2-bit "type-identifier"21:02
lkcl"type is LD/ST"21:02
lkcl"type is BC"21:02
lkcl"type is CR"21:02
lkcli know why IBM added the prefix-identifier: it makes Multi-Issue OoO Decode/Execution way, *way* faster21:03
lkclbecause you can just look at those bits and go "yep that's of type MLSS let's farm it *right now* to the MLSS pipeline"21:03
lkclwhereas - unfortunately - we'll have to go "hang on this is SVP64 errrr let's do a full decode on the next 32-bits to work out whether it's a LD, ST, BC, or CR op"21:04
lkcland you're running into a similar issue in binutils (with the string-matching) just as i did in the python-version :)21:05
lkclprogrammerjake, the 3d maze game port is pretty cool. does it fit into an 8k SRAM?21:05
lkcl(similar size to hello_world.bin or is it more like 24k micro_python.bin?)21:06
lkcljust wondering because if it is really small it can fit into FPGA BRAM21:08
lkclwhich makes testing easier21:08
programmerjakeiirc it already uses the fpga's uses 256kB of ram...the ecp5 85 has around 3Mbit of bram21:17
programmerjakei originally designed the code to fit in 32kB of bram, since that was about half of the available space on the fpga i used for my rv32 core...the other half was used for video stuff (fonts and text framebuffer)21:18
programmerjakei used 256kB cuz it has that much available and cuz that way you basically don't have to worry about your program running out21:19
programmerjake256k == 2^18 iirc. i specified it using `MEMORY_SIZE=$((1<<18))`21:21
programmerjakeif you change the linker script it might fit in 8kB...21:23
programmerjakei just has a little over 8kB code (first 4k used by boot/interrupts, could probably be shrunk) and 0x630 bytes of ram not counting stack (idk if something uses malloc) it probably won't fit in 8kB but could easily fit in 16kB ram21:30
programmerjake0x630 bytes .data/.rodata/.bss21:31
programmerjake0x2b0 of which is .eh_frame, so maybe that can be dropped....i know i passed -fno-exceptions tho21:32
*** alMalsamo is now known as lumberjack12323:16

Generated by 2.17.1 by Marius Gedminas - find it at!