| *** alMalsamo is now known as lumberjack123 | 03:14 | |
| Veera[m] | Hi. Successfully built nextpnr-xilinx and built example arty-35t attosoc.bit. Need advise on which method to take for installation: built binaries installed separately on /usr/local/nextpnr-xilinx or run from source directories. First one may take further effort. | 09:20 |
|---|---|---|
| Veera[m] | I changed parts to make arty-100t (xc7a100tcsg324-1) bit stream as well. | 09:22 |
| Veera[m] | Luke: In which way you are using it. So that I can customise as per your need? | 09:23 |
| lkcl | Veera[m], that's brilliant. i'll run it here and have a go | 10:12 |
| lkcl | Veera[m], ah, please push what you have so i can check it. nextpnr-xilinx-install or something | 10:13 |
| lkcl | binaries to be installed to /usr/local/bin | 10:14 |
| Veera[m] | lkcl: I have hand run it for the start | 10:24 |
| Veera[m] | I have not made nextpnr-xilinx-install yet. In the past for symbiflow I gave you trouble and pain. I do not want to repeat that! Can a separate path like /usr/local/nextpnr-xilinx may be good: so that installed files don't mix and mess up | 10:27 |
| Veera[m] | I wanted to know what you are using as bitstream source: blinky, attosoc, microwatt or libresoc? | 10:28 |
| Veera[m] | And a new yosys version will do or old one or any specified commit version; I used a recommended version which happened to be one of the latest git version | 10:30 |
| lkcl | Veera[m], that is false / a misunderstanding, it was neither "trouble" nor "pain" | 10:32 |
| lkcl | if anything, it is more "trouble" and more "pain" to have to try to work with "guessing" what you are doing | 10:32 |
| lkcl | so please can you commit the script so that i can test it out here | 10:33 |
| lkcl | i need to upload it to the UOregon Server | 10:33 |
| lkcl | actually, now i think about it, can you do it? | 10:33 |
| lkcl | if i introduce you to Erik and Sameer? | 10:33 |
| lkcl | they have an Arty A7-100t connected to the Server | 10:34 |
| Veera[m] | Not now. It may take a day or may be two! | 10:34 |
| lkcl | of course :) | 10:35 |
| Veera[m] | If Erik and Sameer test it will it be proof of working build and finalize afterward? | 10:36 |
| lkcl | they've already done a "basic" test but i have no idea what they did | 10:37 |
| Veera[m] | eh. ... you (lkcl) finalize afterward | 10:37 |
| lkcl | they asked me to do a second test but i am too busy | 10:37 |
| Veera[m] | oh | 10:38 |
| lkcl | you need to test nextpnr-xilinx so if you do the install on the Silicon Server and try it out on their A7-100t it is covering multiple tasks | 10:38 |
| lkcl | i only have about 18 hours left in which to meet a Contractual obligation to complete an FPGA Milestone | 10:39 |
| Veera[m] | ok | 10:39 |
| Veera[m] | what kind of verilog source for test to use. Do you have any suggestions? | 10:39 |
| Veera[m] | I asked because I am new to this method of server connected fpga board! | 10:40 |
| Veera[m] | ok. go on with your important work. I contact afterwards. | 10:41 |
| lkcl | python3 -m nmigen_boards.arty_a7 | 10:41 |
| lkcl | and ask them to check that the lights are blinking | 10:41 |
| lkcl | because you won't be able to see them, obviously | 10:41 |
| lkcl | make sure to use the hdl-dev-repos script | 10:42 |
| lkcl | https://git.libre-soc.org/?p=dev-env-setup.git;a=commitdiff;h=40202d34dd83bf61b99d9c24430fb721ae41d380 | 10:42 |
| lkcl | sorry | 10:42 |
| lkcl | https://git.libre-soc.org/?p=dev-env-setup.git;a=blob;f=hdl-dev-repos;hb=HEAD | 10:42 |
| markos | I wonder if that means I could test my spartan 6 board with this | 10:49 |
| markos | or is it too small? | 10:51 |
| lkcl | mayyybe? :) | 10:55 |
| lkcl | 50k LUT4s (or equivalent) is just enough | 10:56 |
| lkcl | 100k LUT4s (or equivalent) is better | 10:56 |
| lkcl | Xilinx for the 7-series use LUT6s predominantly so like how AMD had to do "equivalent-to-Intel" clock rates for the Opteron Series, they give names "100t" for the Arty A7-100t which are "equivalent" to LUT4s | 10:57 |
| markos | this is the board I have: https://www.avnet.com/opasdata/d120001/medias/docus/178/PB-AES-S6MB-LX9-G-V1.pdf | 10:57 |
| markos | I don't see any mention of LUTs though | 10:58 |
| lkcl | gimmeasec.... | 10:59 |
| lkcl | XC6SLX9-2CSG324C | 10:59 |
| lkcl | need to look up the datasheet for that P/N... | 10:59 |
| markos | ah I think it's too small, 9152 Logic Cells | 11:00 |
| lkcl | Number of Logic Elements:9152 LE | 11:00 |
| lkcl | yep too small | 11:00 |
| markos | never mind | 11:00 |
| lkcl | if you'd be using it regularly we can likely justify getting you something modern | 11:01 |
| lkcl | even if it's "i followed the install scripts and got this far... XYZ report" that's incredibly valuable on its own | 11:02 |
| markos | well, I'd love to be testing SVP64 code on actual hardware, but it's ok, I'm always looking of excuses for doing company expenses | 11:02 |
| markos | s/looking of/looking for/ | 11:02 |
| lkcl | :) | 11:02 |
| lkcl | hey they're offset against tax, so you might as well, eh? :) | 11:03 |
| markos | as long as it's under 1k, I can justify it to my wif^H^H^HDirector :) | 11:03 |
| lkcl | haha yes it'll be around... EUR 500 for a couple of boards? | 11:03 |
| markos | what would be better? a big powerful board or 2 smaller ones? | 11:04 |
| markos | standalone or PCI? | 11:04 |
| markos | and would it make sense to get something to connect to the CAPI on the Talos II? | 11:04 |
| markos | though those are much more expensive I think | 11:05 |
| lkcl | right now, a Digilent Arty A7-100t and an 85F OrangeCrab | 11:05 |
| octavius | lkcl, good news! the waveshare lan and usb pmods came. Send me the postage address and I can ship it to you. | 11:05 |
| markos | I've seen FPGA boards that go up to 8k and I always wondered why they are so expensive | 11:06 |
| lkcl | https://www.mouser.co.uk/ProductDetail/Digilent/410-319-1 | 11:06 |
| lkcl | but get one quick, there's only 4 left in stock at mouser | 11:06 |
| octavius | markos, PCBs quality, high speed interfaces, expensive FPGAs themselves (like the virtex ones) | 11:06 |
| octavius | low-volume production | 11:07 |
| lkcl | https://uk.farnell.com/hackster-launch/orangecrab-r0d2-85/dev-board-ecp5-85f-512-mib-fpga/dp/3651572 | 11:07 |
| lkcl | make sure it's the 85F | 11:07 |
| lkcl | and this https://1bitsquared.de/products/pmod-hyperram | 11:07 |
| lkcl | but the 256 MBit version not the smaller one | 11:07 |
| lkcl | Quad not Single | 11:07 |
| lkcl | octavius, brilliant | 11:08 |
| lkcl | yes some of the 1,000,000 LUT4 FPGAs are over USD 12,000 | 11:08 |
| markos | hyperram? for both or only the orangecrab? | 11:08 |
| lkcl | it's an external plugin (PMOD) that is a "fall-back" for the fact that we can't get DDR3 memory working yet | 11:09 |
| lkcl | it plugs directly into the Arty A7 but you have to solder up a cable if you want to connect it to the OrangeCrab | 11:09 |
| lkcl | but | 11:09 |
| lkcl | later | 11:09 |
| lkcl | we'll get DDR3 working for the orangecrab, and it's cute and small | 11:09 |
| lkcl | oh. UART needed as well | 11:10 |
| lkcl | https://www.amazon.co.uk/DSD-TECH-adapter-FT232RL-Compatible/dp/B07BBPX8B8/ | 11:10 |
| markos | yeah I have plenty of those, JTAG as well | 11:10 |
| lkcl | and some jumper wires https://www.amazon.co.uk/Elegoo-120pcs-Multicolored-Breadboard-arduino-colorful/dp/B01EV70C78 | 11:10 |
| lkcl | ahh excellent | 11:11 |
| markos | my cabinet is full of that stuff | 11:11 |
| lkcl | the orangecrab, sigh, the on-board FT232 is *not* connected up as a UART, so you have to explicitly add one | 11:11 |
| lkcl | :) | 11:11 |
| markos | because of retro computer addiction, er passion | 11:12 |
| markos | have a couple of speccys that I'm fixing/building this period -well weekends only | 11:12 |
| markos | but I have the bench power supply, a cheap usb digital hantek oscilloscope -that works great though- and tons of parts | 11:13 |
| markos | ok, so I'll add the arty to my next order | 11:14 |
| markos | it shows me also a 200LUT digilent Arty board, what would the gain of the extra 100LUTs be? | 11:18 |
| markos | in our case that is | 11:20 |
| lkcl | there's a 200t? cool! | 11:22 |
| markos | https://eu.mouser.com/ProductDetail/Digilent/410-316?qs=KVgMXE4aH4nX2mrW6ulVWg%3D%3D | 11:23 |
| lkcl | it would mean being able potentially to do an FPU | 11:23 |
| markos | then I'll go straight for that one | 11:23 |
| lkcl | ah hang on, it's not an Arty | 11:24 |
| markos | oh | 11:24 |
| lkcl | i need to check if it's supported by nmigen | 11:24 |
| markos | you're right, it's an Artix :D | 11:24 |
| lkcl | otherwise "work has to be done" to create a Constraints file etc. etc. | 11:24 |
| markos | ok | 11:25 |
| lkcl | ah HA! it is actually supported | 11:25 |
| lkcl | and it has PMODs | 11:26 |
| lkcl | https://www.mouser.co.uk/datasheet/2/690/nexys_video_rm-846323.pdf | 11:26 |
| lkcl | and i belieeeve both symbiflow and nextpnr-xilinx support the series 7 200t | 11:27 |
| lkcl | so yes go for it, but also still get the Quad HyperRAM PMOD | 11:27 |
| octavius | lkcl, I won't be able to post it today, but will do tomorrow morning. With first class should hopefully reach you on Friday | 11:27 |
| lkcl | octavius, no problem | 11:28 |
| lkcl | turns out the Arty-A7 has the exact same DP8484848484848 10/100 Eth PHY | 11:29 |
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