Thursday, 2022-04-07

Veera[m]lkcl: Can you point me to dfu-uitl source code uri?01:46
Veera[m]eh. dfu-util!01:46
programmerjakei just used `apt install dfu-util`01:48
programmerjakesource here:
Veera[m]<programmerjake> "source here: https://packages...." <- this I found out myself02:01
Veera[m]programmerjake:  Are you using fpga boards. If so dfu-util is needed for which one. Or lkcl may give the correct answer?02:02
programmerjakei used dfu-util for the orangecrab, idk about other fpga boards02:03
programmerjakeiirc you need a different one for xilinx fpgas02:04
markoslkcl, can predicates take negative values? Error: operand out of range (0x000000000000aaaa is not between 0xffffffffffff8000 and 0x0000000000007fff)10:59
markosthat's the li instruction not the predicate11:00
lkclmarkos :)11:00
markosrubber duck debugging11:00
markosbeen struggling at this since yesterday and it became obvious just when I pasted it11:01
lkclbeen there. once written out, just asking the question is enough11:01
markosalways funny when this happens11:01
lkclpredicates can never be considered negative, they're individual bits that "happen to be in a scalar integer"11:02
lkcli'm assuming you're using sv.op/sm=r3 or something11:02
markossv.fadds/mrr/m=r30 11.v, 11.v, 9.v11:03
markosthe predicate mask needs to be 0b1010101010101010 but apparently I can't use li for it and need to use lwz11:03
markosapart from that it works fine until the last element11:04
markosoriginally it was 0b10101010101010 but it missed the last element11:04
markosI've been checking the dump and the pypowersim output11:04
lkclurgh because it's over 16 bits, bleh.11:05
lkclha, you should be able to use one of grevlut to do that, when we have it!11:05
markosI'll just load the mask for now :)11:06
lkclyes, it's on the list... oh hang on, that's 01010101 not 10101010, but i remember seeing it in the pseudocode11:06
lkclhave to get round to implementing grevlut11:07
markoslkcl, the powersim output is quite rich, what do I look for wrt to predicate masks?11:59
lkclmarkos, 1 sec...11:59
lkclif there's nothing saying "predicate" then it should be added!11:59
lkclfound it12:00
lkclpred_sz and12:01
markossource and destination?12:01
lkclsrcmask and12:01
lkclwhich you can see will be errr srcmask = dstmask = 0xffff_ffff_ffff_ffff12:02
lkclthat should be 64-bit12:02
lkclwhen there's no predicate mask given it is *as if* the predicate mask is all 1s12:02
lkclis that right?12:03
lkclyep it's already 64-bit. ok, whew :)12:04
markosnow to the next instructions12:15
markosI'll commit today this part12:15
markossending you my ssh key asap12:15
lkclmarkos, star.  i'm getting disconnected regularly here btw, due to a storm (high winds)14:43
ghostmansdlkcl, am I right that thing called `imm` and `immed` at e.g. decode_imm is always a 16-bit immediate?16:50
ghostmansde.g. decode_imm() at;a=blob;f=src/openpower/sv/trans/;h=65aa1768fc2cff1a615bbd27c33babdb1a96099b;hb=de70844521d6b6e88e380c729f8384971803454d#l14416:50
ghostmansdand, as a better example,;a=blob;f=src/openpower/sv/trans/;h=65aa1768fc2cff1a615bbd27c33babdb1a96099b;hb=de70844521d6b6e88e380c729f8384971803454d#l37316:50
ghostmansdI'm asking because I'm thinking of adding some relevant checks into binutils, but these checks are not in Python, so I'm kinda unsure16:51
ghostmansdI tried searching ikiwiki, but "immediate" yields many not-so-relevant hits, so I decided it'd be best to ask directly :-)16:52
ghostmansdalso, whilst we're here: at stuff like `sv.stw 5.v, 4(1.v)`, 5 and 1 designate the register id if I get the code correctly; in Power ISA, it's stated we have 32 GPRs/FPRs/VRs, should I check for 0..31 range as well when I decode 5/1?16:58
lkclghostmansd, ahh some of them are 14-bit, some signed, some unsigned, it's down to the individual instruction18:10
lkcl1 sec18:10
lkclok so i *think* i'm right in saying that you simply have to *identify* that the field *is* an immediate18:11
lkclthen use that to reconstruct the v3.0B opcode later, using the immediate "as-is"18:12
lkclSVP64 *extends* register numbers to 128. (0..127)18:15
lkclthat's what get_extra_gpr() is all about (and get_extra_cr3bit())18:16
lkclso you must most definitely *not* check 5/1 against a range 0..3118:16
lkclbut instead check to see if there is enough space in the EXTRA2/3 plus the 5-bit of RA/RB/RT/RC to fit the number18:17
lkclthat's what...18:17
lkclthis is about:18:17
lkclfor INTs and FPRs, EXTRA3 has enough bits18:18
lkclEXTRA3[2] is "scalar/vector"18:19
lkclEXTRA[0:2] is 2-bits, plus 5 from the v3.0B RA/RB/RT/RC that makes 7 bits18:19
lkclbut for EXTRA2 you can't fit it18:19
lkclEXTRA2[1] is "scalar/vector"18:19
lkclthat's only 1 bit18:19
lkclso for scalar, the register number is encoded:18:20
lkcl* bit 7 is zero18:20
lkclbit 6 is EXTRA2[0]18:20
lkclbit 6 is zero18:20
lkclbit 5 is EXTRA2[0]18:20
lkclbit 4..0 goes into the RT/RA/RB/RC field of the v3.0B opcode18:21
lkcland for vector it is18:21
lkcl* bit 6 is 118:21
lkclbits 5..1 go into the RT/RA/RB/RC field of v3.0B opcode18:21
lkclbit 0 is  zero18:21
lkclfor EXTRA2 that gives a range of 0..63 for scalar regnums, and a range of 0,2,4,6,8,10....,124,126 for vector regnums18:22
ghostmansd[m]Ah, OK, now it's clear, will drop 0..31 checks :-)18:31
ghostmansd[m]Thanks for help!18:32
markoslkcl, fyi, just shipped the hyperram pmod so I guess they're in stock in the EU store again?19:17
programmerjakeghostmansd[m]: also openpower v3.1 prefixed instructions can have larger than 16-bit immediates (paddi can have 33-bits, icr what size the v3.1 prefixed load/stores support, though 33-bits is a good guess). none of the v3.1 prefixed imstructions can be svp64 instructions though, since we want to avoid 96-bit instructions with 2 separate prefixes.20:32
lkclmarkos, ah that's good20:42
lkclprogrammerjake, there maaay be a way round that, by using the route described in ZOLC, which would separate the prefix from the suffix and have a *third* L1 Cache for it20:43
programmerjakezolc? abbreviation expansion please20:46
lkclso the idea floating around my head is: like the Borg, adopt ZOLC and use it to "apply" 32-bit prefixes to ranges of 32-bit instructions.21:04
lkcland/or register maps21:04
lkclthis would be one hell of a lot of work, like, a maaajor upgrade to SVP6421:05
programmerjakeiirc we dropped that as too complex -- iirc it was part of our 16-bit instruction set proposal21:05
lkclyes. then i realised that ZOLC has already done it, and that REMAP is remarkably similar to ZOLC21:06
lkclboth even have the same priority-applied "stack"21:06
Veera[m]lkcl: Did you used libftd2xx or libftdi1 is enough?21:17
lkclif i remember correctly one of them is proprietary (so is off the list) the other is libre/open (so is ok)21:23

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