Friday, 2022-04-15

Veera[m]lkcl: read bug report 802. When I was making and installed nextpnr-xilinix-install fasm installed perfectly and was working. Somehow pip3 install invocation for fasm fails randomly (because it tries compiling antlr based fasm - which is not working in upstream and wrongly says installed fasm successfully) But compiling from tarball sources it compiles and installs slower textx based fasm which installs fine and works also.04:55
programmerjakehmm, try running `pip install fasm --no-use-pep517` might work better...05:07
lkclVeera[m], slower and working is great.10:23
lkcla file ANTLRconfig.cmake is completely missing10:23
lkclusing textx is absolutely fine, we have to move on10:25
ghostmansdGood news everyone, binutils now have some basis for the actual instruction remapping.12:28
lkclgood god12:28
ghostmansd`sv.extsw 5.v, 3.v` will be, for now, converted to `extsw 5, 3`12:29
ghostmansdYou might ask, what's that particularly innovative here?12:29
lkclyou managed to identify the regnums? :)12:29
ghostmansdWell, it is actually _encoded_ based on operands we decoded before.12:29
ghostmansdSo, once we apply some magic, we'll be able to adjust the output.12:30
lkclthat's a big step forward12:30
* lkcl manic laughter at the thought of adding binutils to the build dependencies12:30
ghostmansdThe idea is, we have some `sv' stuff, decode it, then adjust the operands, then encode back. In the end, we simply modify the line on-the-fly.12:30
ghostmansdOnce the encoded string is ready, it's passed as is to vanilla binutils.12:31
ghostmansdThere must actually be a pair of strings, yeah.12:31
lkclthat's it. ahh you worked out how to do it on-the-fly12:31
ghostmansdThat's also part of adjustments.12:31
ghostmansdWell, yeah, my ultimate goal is to let binutils handle as much as they can.12:32
lkclthat'll be interesting to present/explain as a patch12:32
lkcli wonder if on-the-fly rewriting could be used elsewhere12:32
ghostmansdYeah. I guess I might do some docs afterwards.12:32
ghostmansdI could do them now, but I'm still in process of constructing the overall idea.12:33
ghostmansdI'm curious whether after remap the resulting instruction "X A,B,C" might end up being bigger than "sv.Y D,E,F"12:34
ghostmansdI guess it can, since some arguments might be optional in vanilla PPC.12:35
lkclno it shouldn't... except for the ".long 0xNNNNNNN;" that has to go in front12:35
ghostmansdAt the same time...12:35
ghostmansdYeah, I was thinking of vice versa, never mind.12:35
lkclwell, aliases are a whole bundle-o-joy12:36
lkcl(bne X --> bc 28, X)12:36
lkclultimately those need supporting12:36
lkclsv.bne X --> sv.bc 28, X12:36
ghostmansdYes, this `.long' is of always fixed size. I think that we might simply call md_assemble recursively (at most three calls).12:37
lkcli haven't even remotely looked at how aliases are supported on scalar ops12:37
lkcltrue, it is.12:37
ghostmansdI think two recursive calls to md_assemble should do the trick. First will deal with fixed-sized buffer `char prefix[sizeof(".long  0xNNNNNNN")]'; the second one would populate the original buffer it got from the original md_assemble invocation.12:40
ghostmansdOr, alternatively, if we ever find we have some instruction that _is_ longer than its "original SV insn", so to speak, we might simply allocate the buffer as needed.12:44
lkclit really shouldn't be.12:45
lkclthe "sv." is removed, anything "x.v" or "x.s" becomes "x"12:45
ghostmansdWell, according to how I understand the overall stuff, it shouldn't, right.12:45
ghostmansdYes, we skip this, so that's two more bytes.12:45
lkcleverything sv.XXXX/YYY/ZZZ becomes just xxxx12:45
ghostmansdI'm thinking about args...12:46
ghostmansd...but these are always present in SVP.12:46
lkclr0.v will be turned into 012:47
lkclimmediates will not be modified12:47
lkcli don't think there's a single instance where anything will increase in size12:47
ghostmansdYeah, seems like an impossible scenario12:48
Veera[m]lkcl:  I think bug 802 is done. What do you think?15:52
lkclVeera[m], i think so, although i'm re-running it and finding things (minerva is missing, i should remove that)15:55
lkclsorted, so yes15:58
Veera[m]lkcl: Can you check/adjust the budget fields for bugs 750, 790, 791 and 802!16:04
lkclVeera[m], ack16:05
lkclall good, i did some of nextpnr-ecp5 and ls2 so i put myself down for EUR 150 on each of those 2, the rest is yours16:07
Veera[m]ok. thanks.16:12
Veera[m]I will submit a draft RFP to you for all the fours bugs!16:13
lkclmake sure they are under the same Project Number16:36
Veera[m]yep. ok. Mean NlNet.2019.0216:40
tplatenfrom where do I clone lambdasoc?16:52
tplatenI did a grep in dev-env-setup, and wasn't helpful either16:52
tplatenfrom lambdasoc.periph.hyperram import HyperRAM, HyperRAMPads, HyperRAMPHY16:52
tplatenModuleNotFoundError: No module named 'lambdasoc'16:52
tplatenI agree that bug 802 is (mostly) done. I'll have a look at that documentation.16:54
tplatenif fpga in ['versa_ecp5', 'versa_ecp5_85', 'isim', 'ulx3s', 'orangecrab']: I added orangecrab (which is ORANGE-CRAB-0.21 in microwatt)17:05
tplatenWhen I tried to push I got FATAL: W any ls2 tobias DENIED by fallthru17:06
lkcltplaten, added you17:08
tplatenWhen I run python3 src/ versa_ecp5 ./hello_world/hello_world.bin (from README.txt) I get17:42
tplatenFile "src/", line 363, in __init__17:42
tplaten    irq=self.uart_irq)17:42
tplatenTypeError: __init__() got an unexpected keyword argument 'irq'17:42
lkcltplaten, update everything. soc, openpower-isa, everything.17:47
lkcltplaten: you need to add the platform17:48
lkcl    # create a platform selected from the toolchain.17:49
lkcl    platform_kls =  {'versa_ecp5': VersaECP5Platform,17:49
lkcland its DRAM IC type17:49
ghostmansd[m]"Open Source" they said18:01
lkclfer f***'s sake18:03
lkclwho's next?18:04
lkcli mean, which *country*, not which *person*18:05
markoswell, they're doing a great job in dividing people all over the world in 2 camps, that's for sure, what could possibly go wrong I wonder18:11
markosdumb question, what's the best way to load a floating point constant in a register in ppc asm? or rather the easiest? I'd like to avoid conversion to hex18:12
markosis there a .float directive?18:13
markosor some macro?18:13
markosah, there is a .float directive lucky me18:15
lkcli didn't know the answer :)18:18
tplatenNext I add the uart_pins to OrangeCrabR0_2_85k_Platform18:24
lkcltplaten, ah no, don't do that18:24
lkclthere is no uart on the orangecrab18:25
lkclso you cannot submit a patch to nmigen to modify the platform18:25
lkclcreate a resource *manually*, and use platform.add_resources()18:25
lkclbecause the resource is how *you* decide to wire up the Tx and Rx18:26
lkclnot how the board is shipped by default as manufactured18:26
lkcllike this:18:27
lkclor, better, use UARTResource(tx=blah, rx=blah)18:27
lkclthen call platform.add_resources()18:27
lkcl*then* call platform.request18:27
lkclUARTResource is here18:28
ghostmansd[m]lkcl, markos, well, there was qt before19:00
ghostmansd[m]They, however, also mumble something about sanctions, embargo and whatnot19:00
ghostmansd[m]I'm frankly already fucking tired to watch and listen how the Western world tries to do virtually anything to make protests in Russia start19:02
ghostmansd[m]Funny that nothing of this concerns Putin's electorate, but rather makes the whole country feel as if it's under the siege, with the future outcome anyone sane should perfectly realize19:03
ghostmansd[m]As someone living in Russia, I rather feel that I've been betrayed by some folks outside, not by the crazy goverment. That's crazy, and I tried to keep away from discussing this topic, but this GitHub shit really pissed me off.19:05
tplatenI agree, so I create the resource in ls2.py19:27
markosghostmansd[m], I think the West is trying its best to start a WW3, it's like all this is planned and being done on purpose, the hypocrisy of the western media is astounding19:48
programmerjakewell, i'm really hoping for *no* WW319:49
markosand really, there are think tanks in the US that have been getting hundreds of millions ir not more, specifically to predict such scenarios, so the outcome of a NATO Ukraine should have been predicted and all the consequences of it thereof19:49
ghostmansd[m]Perhaps. Maybe they all wanted to start it; I wouldn't be surprised if Ukraine's fate is already solved, and, frankly, I won't be surprised if Ukraine is just the start.19:50
markosso, to assume that they were taken by surprise is really naive at best. There are only 2 possibilities here, a) they are stupid and we're led by imbeciles, b) they did predict it and let it happen nevertheless ignoring the consequences19:50
markosbut as usual the innocents pay for it19:51
ghostmansd[m]As for NATO and Ukraine, I'm not sure how it was illustrated in West, but here, in Russia, it never was considered to be a good idea. Moreover, over the years goverment told that this is the red line.19:51
ghostmansd[m]Yes, I guess we all will pay for this.19:51
markosit wasn't a good idea in the first place, Ukraine if they were smart should have taken the Switzerland role and they would end up filthy rich and everyone would be happy19:51
programmerjakethere's also option c: they did predict it but weren't certain of their predictions19:52
markosprogrammerjake, I don't buy that, I'm sorry, we're talking about people whose jobs is to play war scenarios all day19:53
markosthey definitely knew how Putin would react, it's not like he did anything unpredictable here19:53
markoshe literally plays by the book19:53
ghostmansd[m]But I'm really, really pissed that it becomes less and less really political in sense "strange speeches and debates at UN" and more and more becomes like "we will push SWIFT, GitHub, Microsoft, whoever and whatever"19:53
markoswell, guess who's going to hurt more when Putin turns the gas and wheat supply to EU off19:54
markosI'm disgusted by our politicians, the one sane way to solve this would through diplomacy19:55
programmerjakeyeah, imho targeting average russian civilians isn't a very good idea...that said targeting putin doesn't seem to do much19:55
ghostmansd[m]I suspect diplomacy time is over19:56
markosthat won't work also, targeting Putin would have the exact opposite effect right now19:56
ghostmansd[m]Or, well, at least some of diplomats should be changed19:56
ghostmansd[m]Because old dogs don't learn new tricks19:56
markosjust like US has the so called 'Deep state', I bet Russia has something similar19:56
markosanyway, I hope this doesn't end up with nukes19:58
programmerjakestarting to make me sorta wish i lived somewhere that is less likely to pick sides in WW319:58
markosI'm afraid there are no many such places left19:59
ghostmansd[m]programmerjake, don't worry, you won't need to, they'll pick for us :-)19:59
markosoh sorry I thought you meant "livable" places :D20:00
markossure, that will work20:00
ghostmansd[m]I guess much depends on how the Ukraine story will end20:00
programmerjakecurrently it looks like it'll end in a giant mess...not really an ending i guess20:01
markosI think this will end soon and right after China will do something similar with Taiwan20:02
markosofc I'm not an analyst20:02
markosbut I've been reading about that scenario lately20:02
tplatenI know one Russion software, developer who moved to Estonia, so they will not be be affected by the sanctions. They had moved before the beginning of the war.20:03
ghostmansd[m]Yeah, unsurprisingly many folks around will follow the same path20:03
programmerjakei think china knows if they invade taiwan they'll likely be at war with the US20:03
ghostmansd[m]I don't recall if Taiwan belongs to NATO20:03
ghostmansd[m]If not — I bet China will do it20:03
ghostmansd[m]And, frankly, this is not war about Ukraine20:04
ghostmansd[m]It's conflict between Russia and NATO20:04
ghostmansd[m]Where NATO fights with Ukrainian hands20:04
programmerjakeit doesn't belong to NATO but the US effectively has a defence pact with taiwan (as much as it can since it doesn't officially have diplomatic relations to appease china)20:05
ghostmansd[m]If somebody from the West wanted to end this, there wouldn't be weapon supplies from West, eh?20:05
ghostmansd[m]omg yet another chat surrendered under politics20:06
ghostmansd[m]I'm really, really sorry I started this crap20:06
ghostmansd[m]I really was pissed by this GitHub news, and shouldn't have posted it here20:07
programmerjakewell, at least we can talk civilly...20:07
ghostmansd[m]So I suggest we stop here, to avoid flaming and political crap20:07
programmerjakeunlike some other places20:07
ghostmansd[m]Yeah, but that's not the point of this chat20:07
tplatenNow the build runs without errors, but I get warnings like: Resizing cell port uart.uart16550_0.wb_adr_i from 5 bits to 3 bits.20:10
markoswhat's the best way to load a float constant into a register?20:26
programmerjakegenerally a fp-load20:28
programmerjakeor, if our proposal is accepted: fmvis20:30
programmerjakefmvis is a float immediate mv20:31
markosthank you!20:31
markosis this usable right now?20:31
programmerjakeiirc we didn't implement it yet20:32
markosright it's not recognized, oh it would make things so much simpler20:33
markosso back to using lfs20:33
markosah damn, still division by zero20:57
markosthat should work right?20:57
markosaddis 3, 2, .LC_2_0@toc@ha20:57
markoslfs 29, .LC_2_0@toc@l(3)20:58
markossetvl 0,0,2,0,1,120:58
markos# sv.fdivs 38.v, 20.v, 2920:58
markos.long   0x40000000                      # float 220:59
markosso basically, load 2.0 into register f2920:59
markossetvl to 220:59
markosand take registers 20.v (so 20, 21, 22) divide them by f29 (2.0) and put the results into 38.v (so 38, 39, 40)21:00
markosbut I'm getting division by zero21:00
markosbtw, if this thing works21:03
markosthis is going to be super fast21:03
markoswith so many registers it's basically going to compute everything with the loads being in the beginning21:04
markoss/everything/everything in the registers/21:05
programmerjakehmm, i'd guess that the openpower simulator doesn't properly handle division by zero, since python converts that into raising an exception rather than following ieee754 and returning inf/nan21:10
markosbut it still shouldn't give me that, I do load the value in the right register -or at least I think I do, I copied the asm from the assembly output of a simple test program I wrote21:13
lkcltplaten, don't worry about those warnings, it just means i tried to allocate the wishbone connections to the peripherals with too many bits on the address side, just to be safe21:20
lkclmarkos, programmerjake, no i've not done any kind of exception handling in the emulator.  markos, do try not to load zeros into the divisor, for now :)21:22
lkclFloating Divide Single A-form21:22
lkclfdivs      FRT,FRA,FRB        (Rc=0)21:22
lkclThe floating-point operand in register FRA is divided by21:22
lkclthe floating-point operand in register FRB. The remain-21:22
lkclder is not supplied as a result.21:22
lkclmarkos, can i suggest doing that as a unit test21:24
lkclso you can see exactly what is going on21:24
markosok, will do that21:25
lkclthere isn't a fdivs there, so one is needed anyway21:25
lkclremember the trick of ":%s/def test_/def notest_/g" which will disable everything in an easy-to-do (reversible) one-liner21:26
lkcladd just the test you want21:26
lkcland you can run the thing real quick, the output in the log file will contain only that test21:26
lkclit's probably something dumb like, "ya got the args to FPDIV the wrong way round when writing the code in the simulator"21:27
lkcli mean me, not you :)21:27
lkcl    def op_fdivs(self, FRA, FRB):21:29
lkcl        FRT = self.FPDIV32(FRA, FRB)21:29
lkcl        return (FRT,)21:29
lkclghostmansd[m], hey really, don't worry about it. (i mean, speaking up).21:30
lkcl 117 * fdivs FRT,FRA,FRB (Rc=0)21:31
lkcl 122     FRT <- FPDIV32(FRA, FRB)21:31
lkclso now to find the function, FPDIV3221:31
lkcl 312     def FPDIV32(self, FRA, FRB, sign=1):21:33
lkcl 316         result = signinv(float(FRA) / float(FRB), sign)21:33
lkcland, reminder, the spec says:21:33
lkclThe floating-point operand in register FRA is divided by21:33
lkclthe floating-point operand in register FRB. The remain-21:33
lkclso i'd say that's all good21:34
lkclmarkos, really useful calculator btw:
markosok, maybe it's the form I'm using that's the problem21:35
markos# sv.fdivs 38.v, 20.v, 2921:35
lkcltry just fdivs first21:35
lkcland you might want to just add a log() call here21:37
lkcljust to get a handle on what's in the registers21:38
programmerjakeyou could also put a breakpoint there and run it in a python's pretty easy to do if you're using vscode21:38
markosok, tried with plain fdivs, register is 0, seems the lfs is wrong21:41
lkclhere's the one for svp64 FP, again, i added only the things that i knew were used for the mp3 1st test21:42
lkcland (ta-daa) you can see there's some lfs in it21:42
lkcland sv.lfs21:42
lkcli've never done load-constant like that before21:46
lkclmarkos, i assume you didn't miss out the TOC-thing at the top? :)          addi 2,2,.TOC.-.LCF0@l21:52
lkcl        addi 2,2,.TOC.-.LCF0@l21:52
markosno, it's there21:54
markoshm, that's strange21:56
markosthe addis instruction is not there, I have a nop instead21:56
markosin the simulator output21:56
markosaddi is though21:56
markosok, I'll continue tomorrow, I am beat for today21:59
lkclmarkos, the simulator can't handle constants21:59
lkclsorry, can't handle anything but numbers21:59
lkclyou'll have to convert any "variables" (macros) to actual numbers21:59
markosok, makes sense21:59
lkclwhen ghostmansd[m] has sv binutils support you'll be able to do it22:00
markosofc it's a simulator not an assembler22:00
lkclbut this is a reaaaally dumb... yeah.22:00
lkclno aliases either22:00
lkclbne X doesn't exist, it's bc 28,0,X or something22:00
markosok, I'll make a good note :)22:00
markosI'll just have to count exactly the index of the constant relative to TOC :)22:01
ghostmansd[m]fwiw, could you please point me to aliases stuff?22:01
ghostmansd[m]I'd like to take a look at it in advance22:02
markosok, nice to clear this, it's a bit tedious but it's no biggie, I'm starting to get the hang of it22:02
markosalready almost converted the whole loop and the only loads are in the beginning22:02
markosthe whole first loop22:02
lkclghostmansd[m], aliases are usually in the PDF spec22:02
lkclmarkos, nice!22:02
lkclghostmansd[m], let me find one...22:02
markosif this works out the way I expect it to be, it's going to be SUPER fast22:03
lkclok nice table in Power ISA v3.1 doc, p101322:03
lkclBranch if CR0 reflects condition “not equal”.22:03
lkcl    bne      target             (equivalent to: bc 4,2,target)22:03
markosanyway, I really have to sleep now, ttyt22:03
lkclok :)22:04
lkcl Same as (first example), but condition is in CR3.22:04
lkclbne cr3,target (equivalent to: bc 4,14,target)22:04
ghostmansd[m]Hm. I'm not sure whether I've seen something special about aliases handling in vanilla PPC binutils...22:06
ghostmansd[m]I'll check tomorrow.22:06
ghostmansd[m]Take care folks!22:07
lkcltoo ghostmansd[m]22:07
lkclVeera[m], do remember to update "submitted date" (and format) in etc.23:56

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