| Veera[m] | lkcl: read bug report 802. When I was making and installed nextpnr-xilinix-install fasm installed perfectly and was working. Somehow pip3 install invocation for fasm fails randomly (because it tries compiling antlr based fasm - which is not working in upstream and wrongly says installed fasm successfully) But compiling from tarball sources it compiles and installs slower textx based fasm which installs fine and works also. | 04:55 |
|---|---|---|
| programmerjake | hmm, try running `pip install fasm --no-use-pep517`...it might work better... | 05:07 |
| lkcl | Veera[m], slower and working is great. | 10:23 |
| lkcl | a file ANTLRconfig.cmake is completely missing | 10:23 |
| lkcl | using textx is absolutely fine, we have to move on | 10:25 |
| ghostmansd | Good news everyone, binutils now have some basis for the actual instruction remapping. | 12:28 |
| lkcl | good god | 12:28 |
| ghostmansd | `sv.extsw 5.v, 3.v` will be, for now, converted to `extsw 5, 3` | 12:29 |
| ghostmansd | You might ask, what's that particularly innovative here? | 12:29 |
| lkcl | pffh | 12:29 |
| lkcl | you managed to identify the regnums? :) | 12:29 |
| ghostmansd | Well, it is actually _encoded_ based on operands we decoded before. | 12:29 |
| lkcl | hooo-rahh | 12:29 |
| ghostmansd | So, once we apply some magic, we'll be able to adjust the output. | 12:30 |
| lkcl | that's a big step forward | 12:30 |
| * lkcl manic laughter at the thought of adding binutils to the build dependencies | 12:30 | |
| ghostmansd | The idea is, we have some `sv' stuff, decode it, then adjust the operands, then encode back. In the end, we simply modify the line on-the-fly. | 12:30 |
| ghostmansd | Once the encoded string is ready, it's passed as is to vanilla binutils. | 12:31 |
| ghostmansd | There must actually be a pair of strings, yeah. | 12:31 |
| lkcl | that's it. ahh you worked out how to do it on-the-fly | 12:31 |
| ghostmansd | That's also part of adjustments. | 12:31 |
| ghostmansd | Well, yeah, my ultimate goal is to let binutils handle as much as they can. | 12:32 |
| lkcl | that'll be interesting to present/explain as a patch | 12:32 |
| lkcl | i wonder if on-the-fly rewriting could be used elsewhere | 12:32 |
| ghostmansd | Yeah. I guess I might do some docs afterwards. | 12:32 |
| ghostmansd | I could do them now, but I'm still in process of constructing the overall idea. | 12:33 |
| ghostmansd | I'm curious whether after remap the resulting instruction "X A,B,C" might end up being bigger than "sv.Y D,E,F" | 12:34 |
| lkcl | hmmm | 12:35 |
| ghostmansd | I guess it can, since some arguments might be optional in vanilla PPC. | 12:35 |
| lkcl | no it shouldn't... except for the ".long 0xNNNNNNN;" that has to go in front | 12:35 |
| ghostmansd | At the same time... | 12:35 |
| ghostmansd | Yeah, I was thinking of vice versa, never mind. | 12:35 |
| lkcl | well, aliases are a whole bundle-o-joy | 12:36 |
| lkcl | (bne X --> bc 28, X) | 12:36 |
| lkcl | ultimately those need supporting | 12:36 |
| lkcl | sv.bne X --> sv.bc 28, X | 12:36 |
| ghostmansd | Yes, this `.long' is of always fixed size. I think that we might simply call md_assemble recursively (at most three calls). | 12:37 |
| lkcl | i haven't even remotely looked at how aliases are supported on scalar ops | 12:37 |
| lkcl | true, it is. | 12:37 |
| ghostmansd | I think two recursive calls to md_assemble should do the trick. First will deal with fixed-sized buffer `char prefix[sizeof(".long 0xNNNNNNN")]'; the second one would populate the original buffer it got from the original md_assemble invocation. | 12:40 |
| ghostmansd | Or, alternatively, if we ever find we have some instruction that _is_ longer than its "original SV insn", so to speak, we might simply allocate the buffer as needed. | 12:44 |
| lkcl | it really shouldn't be. | 12:45 |
| lkcl | the "sv." is removed, anything "x.v" or "x.s" becomes "x" | 12:45 |
| ghostmansd | Well, according to how I understand the overall stuff, it shouldn't, right. | 12:45 |
| ghostmansd | Yes, we skip this, so that's two more bytes. | 12:45 |
| lkcl | everything sv.XXXX/YYY/ZZZ becomes just xxxx | 12:45 |
| ghostmansd | I'm thinking about args... | 12:46 |
| ghostmansd | ...but these are always present in SVP. | 12:46 |
| lkcl | r0.v will be turned into 0 | 12:47 |
| lkcl | immediates will not be modified | 12:47 |
| lkcl | i don't think there's a single instance where anything will increase in size | 12:47 |
| ghostmansd | Yeah, seems like an impossible scenario | 12:48 |
| Veera[m] | lkcl: I think bug 802 is done. What do you think? | 15:52 |
| lkcl | Veera[m], i think so, although i'm re-running it and finding things (minerva is missing, i should remove that) | 15:55 |
| lkcl | sorted, so yes | 15:58 |
| Veera[m] | lkcl: Can you check/adjust the budget fields for bugs 750, 790, 791 and 802! | 16:04 |
| lkcl | Veera[m], ack | 16:05 |
| lkcl | all good, i did some of nextpnr-ecp5 and ls2 so i put myself down for EUR 150 on each of those 2, the rest is yours | 16:07 |
| Veera[m] | ok. thanks. | 16:12 |
| Veera[m] | I will submit a draft RFP to you for all the fours bugs! | 16:13 |
| lkcl | make sure they are under the same Project Number | 16:36 |
| Veera[m] | yep. ok. Mean NlNet.2019.02 | 16:40 |
| tplaten | from where do I clone lambdasoc? | 16:52 |
| tplaten | I did a grep in dev-env-setup, and https://libre-soc.org/HDL_workflow/ls2/ wasn't helpful either | 16:52 |
| tplaten | from lambdasoc.periph.hyperram import HyperRAM, HyperRAMPads, HyperRAMPHY | 16:52 |
| tplaten | ModuleNotFoundError: No module named 'lambdasoc' | 16:52 |
| tplaten | I agree that bug 802 is (mostly) done. I'll have a look at that documentation. | 16:54 |
| tplaten | if fpga in ['versa_ecp5', 'versa_ecp5_85', 'isim', 'ulx3s', 'orangecrab']: I added orangecrab (which is ORANGE-CRAB-0.21 in microwatt) | 17:05 |
| tplaten | When I tried to push I got FATAL: W any ls2 tobias DENIED by fallthru | 17:06 |
| lkcl | https://git.libre-soc.org/?p=lambdasoc.git;a=summary | 17:07 |
| lkcl | tplaten, added you | 17:08 |
| tplaten | pushed | 17:34 |
| tplaten | When I run python3 src/ls2.py versa_ecp5 ./hello_world/hello_world.bin (from README.txt) I get | 17:42 |
| tplaten | File "src/ls2.py", line 363, in __init__ | 17:42 |
| tplaten | irq=self.uart_irq) | 17:42 |
| tplaten | TypeError: __init__() got an unexpected keyword argument 'irq' | 17:42 |
| lkcl | tplaten, update everything. soc, openpower-isa, everything. | 17:47 |
| lkcl | tplaten: you need to add the platform | 17:48 |
| lkcl | # create a platform selected from the toolchain. | 17:49 |
| lkcl | platform_kls = {'versa_ecp5': VersaECP5Platform, | 17:49 |
| lkcl | and its DRAM IC type | 17:49 |
| ghostmansd[m] | https://gamingsym.in/github-started-blocking-accounts-of-russian-developers-sberbank-and-alfa-bank-have-already-been-banned/ | 18:01 |
| ghostmansd[m] | "Open Source" they said | 18:01 |
| lkcl | fer f***'s sake | 18:03 |
| lkcl | who's next? | 18:04 |
| lkcl | i mean, which *country*, not which *person* | 18:05 |
| markos | speechless | 18:10 |
| markos | well, they're doing a great job in dividing people all over the world in 2 camps, that's for sure, what could possibly go wrong I wonder | 18:11 |
| markos | dumb question, what's the best way to load a floating point constant in a register in ppc asm? or rather the easiest? I'd like to avoid conversion to hex | 18:12 |
| markos | is there a .float directive? | 18:13 |
| markos | or some macro? | 18:13 |
| markos | ah, there is a .float directive lucky me | 18:15 |
| lkcl | i didn't know the answer :) | 18:18 |
| tplaten | Next I add the uart_pins to OrangeCrabR0_2_85k_Platform | 18:24 |
| lkcl | tplaten, ah no, don't do that | 18:24 |
| lkcl | there is no uart on the orangecrab | 18:25 |
| lkcl | so you cannot submit a patch to nmigen to modify the platform | 18:25 |
| lkcl | instead | 18:25 |
| lkcl | create a resource *manually*, and use platform.add_resources() | 18:25 |
| lkcl | because the resource is how *you* decide to wire up the Tx and Rx | 18:26 |
| lkcl | not how the board is shipped by default as manufactured | 18:26 |
| lkcl | like this: | 18:27 |
| lkcl | https://git.libre-soc.org/?p=ls2.git;a=blob;f=src/ls2.py;h=f7586cf2263ea6e0b42945455b12197d0d484374;hb=2b9b7be75a2b405456fedace894a47bc32ed2b14#l904 | 18:27 |
| lkcl | or, better, use UARTResource(tx=blah, rx=blah) | 18:27 |
| lkcl | then call platform.add_resources() | 18:27 |
| lkcl | *then* call platform.request | 18:27 |
| lkcl | UARTResource is here | 18:28 |
| lkcl | https://gitlab.com/nmigen/nmigen-boards/-/blob/master/nmigen_boards/resources/interface.py#L10 | 18:28 |
| ghostmansd[m] | lkcl, markos, well, there was qt before | 19:00 |
| ghostmansd[m] | https://lists.qt-project.org/pipermail/development/2022-March/042288.html | 19:00 |
| ghostmansd[m] | They, however, also mumble something about sanctions, embargo and whatnot | 19:00 |
| ghostmansd[m] | I'm frankly already fucking tired to watch and listen how the Western world tries to do virtually anything to make protests in Russia start | 19:02 |
| ghostmansd[m] | Funny that nothing of this concerns Putin's electorate, but rather makes the whole country feel as if it's under the siege, with the future outcome anyone sane should perfectly realize | 19:03 |
| ghostmansd[m] | As someone living in Russia, I rather feel that I've been betrayed by some folks outside, not by the crazy goverment. That's crazy, and I tried to keep away from discussing this topic, but this GitHub shit really pissed me off. | 19:05 |
| tplaten | I agree, so I create the resource in ls2.py | 19:27 |
| markos | ghostmansd[m], I think the West is trying its best to start a WW3, it's like all this is planned and being done on purpose, the hypocrisy of the western media is astounding | 19:48 |
| programmerjake | well, i'm really hoping for *no* WW3 | 19:49 |
| markos | and really, there are think tanks in the US that have been getting hundreds of millions ir not more, specifically to predict such scenarios, so the outcome of a NATO Ukraine should have been predicted and all the consequences of it thereof | 19:49 |
| ghostmansd[m] | Perhaps. Maybe they all wanted to start it; I wouldn't be surprised if Ukraine's fate is already solved, and, frankly, I won't be surprised if Ukraine is just the start. | 19:50 |
| markos | so, to assume that they were taken by surprise is really naive at best. There are only 2 possibilities here, a) they are stupid and we're led by imbeciles, b) they did predict it and let it happen nevertheless ignoring the consequences | 19:50 |
| markos | but as usual the innocents pay for it | 19:51 |
| ghostmansd[m] | As for NATO and Ukraine, I'm not sure how it was illustrated in West, but here, in Russia, it never was considered to be a good idea. Moreover, over the years goverment told that this is the red line. | 19:51 |
| ghostmansd[m] | Yes, I guess we all will pay for this. | 19:51 |
| markos | it wasn't a good idea in the first place, Ukraine if they were smart should have taken the Switzerland role and they would end up filthy rich and everyone would be happy | 19:51 |
| programmerjake | there's also option c: they did predict it but weren't certain of their predictions | 19:52 |
| markos | programmerjake, I don't buy that, I'm sorry, we're talking about people whose jobs is to play war scenarios all day | 19:53 |
| markos | they definitely knew how Putin would react, it's not like he did anything unpredictable here | 19:53 |
| markos | he literally plays by the book | 19:53 |
| ghostmansd[m] | But I'm really, really pissed that it becomes less and less really political in sense "strange speeches and debates at UN" and more and more becomes like "we will push SWIFT, GitHub, Microsoft, whoever and whatever" | 19:53 |
| markos | well, guess who's going to hurt more when Putin turns the gas and wheat supply to EU off | 19:54 |
| markos | I'm disgusted by our politicians, the one sane way to solve this would through diplomacy | 19:55 |
| programmerjake | yeah, imho targeting average russian civilians isn't a very good idea...that said targeting putin doesn't seem to do much | 19:55 |
| ghostmansd[m] | I suspect diplomacy time is over | 19:56 |
| markos | that won't work also, targeting Putin would have the exact opposite effect right now | 19:56 |
| ghostmansd[m] | Or, well, at least some of diplomats should be changed | 19:56 |
| ghostmansd[m] | Because old dogs don't learn new tricks | 19:56 |
| markos | just like US has the so called 'Deep state', I bet Russia has something similar | 19:56 |
| markos | anyway, I hope this doesn't end up with nukes | 19:58 |
| programmerjake | starting to make me sorta wish i lived somewhere that is less likely to pick sides in WW3 | 19:58 |
| markos | I'm afraid there are no many such places left | 19:59 |
| ghostmansd[m] | programmerjake, don't worry, you won't need to, they'll pick for us :-) | 19:59 |
| programmerjake | Antarctica? | 19:59 |
| markos | oh sorry I thought you meant "livable" places :D | 20:00 |
| markos | sure, that will work | 20:00 |
| ghostmansd[m] | I guess much depends on how the Ukraine story will end | 20:00 |
| programmerjake | currently it looks like it'll end in a giant mess...not really an ending i guess | 20:01 |
| markos | I think this will end soon and right after China will do something similar with Taiwan | 20:02 |
| markos | ofc I'm not an analyst | 20:02 |
| markos | but I've been reading about that scenario lately | 20:02 |
| tplaten | I know one Russion software, developer who moved to Estonia, so they will not be be affected by the sanctions. They had moved before the beginning of the war. | 20:03 |
| ghostmansd[m] | Yeah, unsurprisingly many folks around will follow the same path | 20:03 |
| programmerjake | i think china knows if they invade taiwan they'll likely be at war with the US | 20:03 |
| ghostmansd[m] | I don't recall if Taiwan belongs to NATO | 20:03 |
| ghostmansd[m] | If not — I bet China will do it | 20:03 |
| ghostmansd[m] | And, frankly, this is not war about Ukraine | 20:04 |
| ghostmansd[m] | It's conflict between Russia and NATO | 20:04 |
| ghostmansd[m] | Where NATO fights with Ukrainian hands | 20:04 |
| programmerjake | it doesn't belong to NATO but the US effectively has a defence pact with taiwan (as much as it can since it doesn't officially have diplomatic relations to appease china) | 20:05 |
| ghostmansd[m] | If somebody from the West wanted to end this, there wouldn't be weapon supplies from West, eh? | 20:05 |
| ghostmansd[m] | omg yet another chat surrendered under politics | 20:06 |
| ghostmansd[m] | I'm really, really sorry I started this crap | 20:06 |
| ghostmansd[m] | I really was pissed by this GitHub news, and shouldn't have posted it here | 20:07 |
| programmerjake | well, at least we can talk civilly... | 20:07 |
| ghostmansd[m] | So I suggest we stop here, to avoid flaming and political crap | 20:07 |
| programmerjake | unlike some other places | 20:07 |
| ghostmansd[m] | Yeah, but that's not the point of this chat | 20:07 |
| tplaten | Now the build runs without errors, but I get warnings like: Resizing cell port uart.uart16550_0.wb_adr_i from 5 bits to 3 bits. | 20:10 |
| markos | argh | 20:26 |
| markos | what's the best way to load a float constant into a register? | 20:26 |
| programmerjake | generally a fp-load | 20:28 |
| programmerjake | or, if our proposal is accepted: fmvis | 20:30 |
| programmerjake | https://libre-soc.org/openpower/sv/int_fp_mv/ | 20:30 |
| programmerjake | fmvis is a float immediate mv | 20:31 |
| markos | thank you! | 20:31 |
| markos | is this usable right now? | 20:31 |
| programmerjake | iirc we didn't implement it yet | 20:32 |
| markos | right it's not recognized, oh it would make things so much simpler | 20:33 |
| markos | so back to using lfs | 20:33 |
| markos | ah damn, still division by zero | 20:57 |
| markos | that should work right? | 20:57 |
| markos | addis 3, 2, .LC_2_0@toc@ha | 20:57 |
| markos | lfs 29, .LC_2_0@toc@l(3) | 20:58 |
| markos | setvl 0,0,2,0,1,1 | 20:58 |
| markos | # sv.fdivs 38.v, 20.v, 29 | 20:58 |
| markos | and.LC_2_0: | 20:58 |
| markos | .LC_2_0: | 20:58 |
| markos | .long 0x40000000 # float 2 | 20:59 |
| markos | so basically, load 2.0 into register f29 | 20:59 |
| markos | setvl to 2 | 20:59 |
| markos | and take registers 20.v (so 20, 21, 22) divide them by f29 (2.0) and put the results into 38.v (so 38, 39, 40) | 21:00 |
| markos | but I'm getting division by zero | 21:00 |
| markos | btw, if this thing works | 21:03 |
| markos | this is going to be super fast | 21:03 |
| markos | with so many registers it's basically going to compute everything with the loads being in the beginning | 21:04 |
| markos | s/everything/everything in the registers/ | 21:05 |
| programmerjake | hmm, i'd guess that the openpower simulator doesn't properly handle division by zero, since python converts that into raising an exception rather than following ieee754 and returning inf/nan | 21:10 |
| markos | but it still shouldn't give me that, I do load the value in the right register -or at least I think I do, I copied the asm from the assembly output of a simple test program I wrote | 21:13 |
| lkcl | tplaten, don't worry about those warnings, it just means i tried to allocate the wishbone connections to the peripherals with too many bits on the address side, just to be safe | 21:20 |
| lkcl | markos, programmerjake, no i've not done any kind of exception handling in the emulator. markos, do try not to load zeros into the divisor, for now :) | 21:22 |
| lkcl | Floating Divide Single A-form | 21:22 |
| lkcl | fdivs FRT,FRA,FRB (Rc=0) | 21:22 |
| lkcl | The floating-point operand in register FRA is divided by | 21:22 |
| lkcl | the floating-point operand in register FRB. The remain- | 21:22 |
| lkcl | der is not supplied as a result. | 21:22 |
| lkcl | markos, can i suggest doing that as a unit test | 21:24 |
| lkcl | so you can see exactly what is going on | 21:24 |
| markos | ok | 21:24 |
| lkcl | https://git.libre-soc.org/?p=openpower-isa.git;a=blob;f=src/openpower/decoder/isa/test_caller_fp.py;hb=HEAD | 21:25 |
| markos | ok, will do that | 21:25 |
| lkcl | there isn't a fdivs there, so one is needed anyway | 21:25 |
| lkcl | remember the trick of ":%s/def test_/def notest_/g" which will disable everything in an easy-to-do (reversible) one-liner | 21:26 |
| lkcl | add just the test you want | 21:26 |
| markos | yup | 21:26 |
| lkcl | and you can run the thing real quick, the output in the log file will contain only that test | 21:26 |
| lkcl | it's probably something dumb like, "ya got the args to FPDIV the wrong way round when writing the code in the simulator" | 21:27 |
| lkcl | i mean me, not you :) | 21:27 |
| markos | :) | 21:27 |
| lkcl | def op_fdivs(self, FRA, FRB): | 21:29 |
| lkcl | FRT = self.FPDIV32(FRA, FRB) | 21:29 |
| lkcl | return (FRT,) | 21:29 |
| lkcl | ghostmansd[m], hey really, don't worry about it. (i mean, speaking up). | 21:30 |
| lkcl | https://git.libre-soc.org/?p=openpower-isa.git;a=blob;f=openpower/isa/fparith.mdwn;h=d902a07440aea34cc37525ed360ca04ec01d5365;hb=a2a3dfad9e681563d5f44116ed2bfd6e7fc1f9fe#l113 | 21:30 |
| lkcl | 117 * fdivs FRT,FRA,FRB (Rc=0) | 21:31 |
| lkcl | 122 FRT <- FPDIV32(FRA, FRB) | 21:31 |
| lkcl | so now to find the function, FPDIV32 | 21:31 |
| lkcl | openpower/decoder/helpers.py... | 21:32 |
| lkcl | https://git.libre-soc.org/?p=openpower-isa.git;a=blob;f=src/openpower/decoder/helpers.py;h=3dba556771aacd8bda20884a14e0c2be4bc66e1a;hb=HEAD#l312 | 21:32 |
| lkcl | 312 def FPDIV32(self, FRA, FRB, sign=1): | 21:33 |
| lkcl | 316 result = signinv(float(FRA) / float(FRB), sign) | 21:33 |
| lkcl | and, reminder, the spec says: | 21:33 |
| lkcl | The floating-point operand in register FRA is divided by | 21:33 |
| lkcl | the floating-point operand in register FRB. The remain- | 21:33 |
| lkcl | so i'd say that's all good | 21:34 |
| lkcl | markos, really useful calculator btw: http://weitz.de/ieee/ | 21:34 |
| markos | ok, maybe it's the form I'm using that's the problem | 21:35 |
| markos | # sv.fdivs 38.v, 20.v, 29 | 21:35 |
| lkcl | try just fdivs first | 21:35 |
| lkcl | and you might want to just add a log() call here | 21:37 |
| lkcl | https://git.libre-soc.org/?p=openpower-isa.git;a=blob;f=src/openpower/decoder/helpers.py;h=3dba556771aacd8bda20884a14e0c2be4bc66e1a;hb=HEAD#l312 | 21:37 |
| lkcl | just to get a handle on what's in the registers | 21:38 |
| programmerjake | you could also put a breakpoint there and run it in a python debugger...it's pretty easy to do if you're using vscode | 21:38 |
| markos | ok, tried with plain fdivs, register is 0, seems the lfs is wrong | 21:41 |
| lkcl | here's the one for svp64 FP, again, i added only the things that i knew were used for the mp3 1st test | 21:42 |
| lkcl | https://git.libre-soc.org/?p=openpower-isa.git;a=blob;f=src/openpower/decoder/isa/test_caller_svp64_fp.py;hb=HEAD | 21:42 |
| lkcl | and (ta-daa) you can see there's some lfs in it | 21:42 |
| lkcl | and sv.lfs | 21:42 |
| lkcl | i've never done load-constant like that before | 21:46 |
| lkcl | https://godbolt.org/z/hMGnvKW9b | 21:49 |
| lkcl | https://godbolt.org/z/Mf78M1eEP | 21:49 |
| lkcl | markos, i assume you didn't miss out the TOC-thing at the top? :) addi 2,2,.TOC.-.LCF0@l | 21:52 |
| lkcl | addi 2,2,.TOC.-.LCF0@l | 21:52 |
| markos | no, it's there | 21:54 |
| markos | hm, that's strange | 21:56 |
| markos | the addis instruction is not there, I have a nop instead | 21:56 |
| markos | in the simulator output | 21:56 |
| markos | addi is though | 21:56 |
| markos | ok, I'll continue tomorrow, I am beat for today | 21:59 |
| lkcl | markos, the simulator can't handle constants | 21:59 |
| lkcl | sorry, can't handle anything but numbers | 21:59 |
| markos | aha! | 21:59 |
| markos | damn | 21:59 |
| lkcl | you'll have to convert any "variables" (macros) to actual numbers | 21:59 |
| markos | ok, makes sense | 21:59 |
| lkcl | when ghostmansd[m] has sv binutils support you'll be able to do it | 22:00 |
| markos | ofc it's a simulator not an assembler | 22:00 |
| lkcl | but this is a reaaaally dumb... yeah. | 22:00 |
| markos | hahaha | 22:00 |
| lkcl | no aliases either | 22:00 |
| lkcl | bne X doesn't exist, it's bc 28,0,X or something | 22:00 |
| markos | ok, I'll make a good note :) | 22:00 |
| lkcl | :) | 22:00 |
| markos | I'll just have to count exactly the index of the constant relative to TOC :) | 22:01 |
| lkcl | urrrr | 22:01 |
| ghostmansd[m] | fwiw, could you please point me to aliases stuff? | 22:01 |
| ghostmansd[m] | I'd like to take a look at it in advance | 22:02 |
| markos | ok, nice to clear this, it's a bit tedious but it's no biggie, I'm starting to get the hang of it | 22:02 |
| markos | already almost converted the whole loop and the only loads are in the beginning | 22:02 |
| markos | the whole first loop | 22:02 |
| lkcl | ghostmansd[m], aliases are usually in the PDF spec | 22:02 |
| lkcl | markos, nice! | 22:02 |
| lkcl | ghostmansd[m], let me find one... | 22:02 |
| markos | if this works out the way I expect it to be, it's going to be SUPER fast | 22:03 |
| lkcl | ok nice table in Power ISA v3.1 doc, p1013 | 22:03 |
| lkcl | Branch if CR0 reflects condition ânot equalâ. | 22:03 |
| lkcl | bne target (equivalent to: bc 4,2,target) | 22:03 |
| markos | anyway, I really have to sleep now, ttyt | 22:03 |
| lkcl | ok :) | 22:04 |
| lkcl | Same as (first example), but condition is in CR3. | 22:04 |
| lkcl | bne cr3,target (equivalent to: bc 4,14,target) | 22:04 |
| ghostmansd[m] | Aha | 22:05 |
| ghostmansd[m] | Hm. I'm not sure whether I've seen something special about aliases handling in vanilla PPC binutils... | 22:06 |
| ghostmansd[m] | I'll check tomorrow. | 22:06 |
| ghostmansd[m] | Take care folks! | 22:07 |
| lkcl | too ghostmansd[m] | 22:07 |
| lkcl | Veera[m], do remember to update "submitted date" (and format) in https://bugs.libre-soc.org/show_bug.cgi?id=791 etc. | 23:56 |
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