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| markos_ | lkcl, thought about that, reg. the the double-width-shift, maddrs/msubrs could be used for that purpose, for left shifts we coudl either a) use left shifts with negative immediate values, or b) provide maddls/msubls | 11:26 |
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| openpowerbot | [irc] <sadoon[m]1> https://www.researchgate.net/publication/301412054_Design_of_DDR4_SDRAM_controller | 11:51 |
| openpowerbot | [irc] <sadoon[m]1> Another good resource re: DDR4, will read it later today | 11:51 |
| openpowerbot | [irc] <sadoon[m]1> Sorry IRC guys, let me fix that | 11:51 |
| openpowerbot | [irc] <sadoon[m]1> https://www.researchgate.net/publication/301412054_Design_of_DDR4_SDRAM_controller | 11:51 |
| openpowerbot | [irc] <sadoon[m]1> Another good resource re: DDR4, will read it later today | 11:51 |
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| openpowerbot | [irc] <sadoon[m]1> Just read it, the more I read about modern DRAM architectures, it seems the best option | 14:37 |
| openpowerbot | [irc] <sadoon[m]1> Is to implement an older version | 14:37 |
| openpowerbot | [irc] <sadoon[m]1> There aren't massive changes between revisions from a controller standpoint, but it did get more complicated with DDR4 | 14:38 |
| openpowerbot | [irc] <sadoon[m]1> If we have DDR2/3 for example, DDR4 would be say 20-30% more work? | 14:39 |
| openpowerbot | [irc] <sadoon[m]1> Etc | 14:39 |
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| openpowerbot | [irc] <cesar[m]1> sadoon, interesting find about the low clock speed DDR3 controller. | 15:36 |
| openpowerbot | [irc] <sadoon[m]1> Yes that's definitely useful | 15:37 |
| openpowerbot | [irc] <cesar[m]1> The repository as a whole doesn't have a license file, but the header in each file indicates the Apache2 license. | 15:37 |
| openpowerbot | [irc] <sadoon[m]1> But again we can't use it easily without contacting the developer | 15:37 |
| openpowerbot | [irc] <sadoon[m]1> cesar[m]1: Ah, nice catch! | 15:38 |
| openpowerbot | [irc] <sadoon[m]1> If that's the case then good | 15:38 |
| markos_ | well, even then, we can use it, internally, and see if it's working, and if it does, then we can contact the developer and get a friendly open source license to libresoc | 15:40 |
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| openpowerbot | [irc] <sadoon[m]1> And DDR3 is dirt cheap anyways | 16:17 |
| openpowerbot | [irc] <programmerjake> Apache 2 is explicitly compatible with GPLv3 iirc, so we wouldn't need to ask them to relicense it | 16:46 |
| openpowerbot | [irc] <programmerjake> since our HDL is all LGPLv3 | 16:46 |
| openpowerbot | [irc] <sadoon[m]1> Cesar was also right, it's indeed Apache but the maintainer forgot to put a LICENSE file | 16:48 |
| openpowerbot | [irc] <programmerjake> https://www.apache.org/licenses/GPL-compatibility.html | 16:48 |
| openpowerbot | [irc] <sadoon[m]1> It's been abandoned so we might have to pick up where they left off | 16:48 |
| openpowerbot | [irc] <sadoon[m]1> "currently supports Xilinx 7 series (Artix, Kintex) and Lattice ECP5 FPGAs" | 16:49 |
| openpowerbot | [irc] <sadoon[m]1> Also very good for us | 16:49 |
| cesar | Hey, I've arranged to give you a nice demontration of that CNC machine we've been building, for the next Tuesday meeting. | 17:52 |
| openpowerbot | [irc] <programmerjake> nice! | 17:56 |
| cesar | It seems we were able to iron out most of the kinks. | 17:56 |
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| openpowerbot | [irc] <sadoon[m]1> Awesome | 19:15 |
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| lkcl | cesar, oooo! | 19:49 |
| lkcl | markos_, fantastic. | 19:50 |
| lkcl | btw when you create those bugreports (specific for ed25519) i can provide the relevant insights, i don't want to... well i could mention them here | 19:51 |
| lkcl | basically the "low-level primitives" - jacob and i did Knuth Algorithm D and M - are already there | 19:51 |
| lkcl | we just didn't get round to doing an actual port/demo of Knuth D or M | 19:51 |
| lkcl | but unit test demos *of* the actual instructions *for* implementing long-multiply and long-divide by using SVP64 to do *all* of one of the inner-loops | 19:52 |
| lkcl | (thus reducing M and D to a single outer-loop if you have a fixed register-width) | 19:53 |
| lkcl | are all done (almost a year ago now) | 19:53 |
| lkcl | https://git.libre-soc.org/?p=openpower-isa.git;a=blob;f=src/openpower/decoder/isa/test_caller_svp64_bigint.py;hb=HEAD | 19:53 |
| lkcl | aw doh | 19:53 |
| lkcl | 1 sec | 19:53 |
| lkcl | https://git.libre-soc.org/?p=openpower-isa.git;a=blob;f=src/openpower/test/bigint/bigint_cases.py;h=38ad4e0;hb=HEAD#l128 | 19:54 |
| lkcl | vector-vector add (and correspondingly vector-vector sub) is brain-dead-simple. | 19:55 |
| lkcl | sv.adde | 19:55 |
| lkcl | done. | 19:55 |
| lkcl | https://git.libre-soc.org/?p=openpower-isa.git;a=blob;f=openpower/isa/maddrs.mdwn;hb=HEAD | 19:57 |
| lkcl | hmmmm.... | 19:57 |
| lkcl | this is double-width-shift-left: | 20:02 |
| lkcl | https://git.libre-soc.org/?p=openpower-isa.git;a=blob;f=openpower/isa/svfixedarith.mdwn;h=6ce79fb69925bef2faef666c0a251e860ec3e3b0;hb=HEAD#l79 | 20:02 |
| lkcl | RB - the amount to shift | 20:02 |
| lkcl | (RA || RC) << RB => (RS || RT) | 20:06 |
| lkcl | and when chained-together, RS is the carry-out which becomes the 64-bit-wide carry-in to RC | 20:06 |
| lkcl | i'm not entiiirely sure how to express that RA || RC should be an *addition*... ermermerm... | 20:07 |
| lkcl | it *could* be as simple as: | 20:08 |
| lkcl | 87 RT <- (v[0:63] & mask) | ((RC) & ¬mask) | 20:08 |
| lkcl | --> | 20:08 |
| lkcl | 87 RT <- (v[0:63] & mask) | (RC) | 20:08 |
| lkcl | sorry | 20:08 |
| lkcl | 87 RT <- (v[0:63] & mask) + (RC) | 20:08 |
| lkcl | honestly i have been slightly caught off-guard by the Haskell ed25519 routine because it is in what is known as "carry-save" format | 20:10 |
| lkcl | i.e. rather than what you normally do in long-multiplication, when you do each digit multiply you always always right there right then do a carry-ripple right the way through the intermediary result | 20:11 |
| lkcl | you instead save *both* digits of each of the 1-digit long-multiply (9x9==81 for example, you save *81* rather than "write down the 1 and ripple-carry-the-8") | 20:12 |
| lkcl | then perform all of the needed adds *afterwards* as a completely separate step. | 20:13 |
| lkcl | i never analysed that algorithm so have no idea what arithmetic primitives are actually needed | 20:14 |
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| lkcl | https://bugs.libre-soc.org/show_bug.cgi?id=773#c3 edited | 20:27 |
| lkcl | nggggh.... yyyeahhh... https://bugs.libre-soc.org/show_bug.cgi?id=773#c1 | 20:36 |
| lkcl | add128_64 is simply being used as a standard 64-bit-carry-aware-add (where "carry" is a single bit) | 20:37 |
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| lkcl | no wait... | 20:40 |
| lkcl | it's a 128-bit in, plus a 64-bit in, where the result is 128-bit BUT the hi-half obviously only rolls over by a single bit carry-in | 20:41 |
| lkcl | for which, i think, annoyingly, we'd need like... 4-in 3-out to cover that with 64-bit regs | 20:42 |
| lkcl | because it's a 128-bit input (2in) plus a 64-bit input (1-in) shifted by a fixed-amount (hmmm ok just 3-in) producing a 128-bit result (2-out) but with a... a... oh hang on it *might* be possible | 20:44 |
| lkcl | just incredibly expensive in terms of operands (because the shift-amount as an immediate is another 5 bits) | 20:45 |
| lkcl | hmmmm... | 20:45 |
| openpowerbot | [irc] <sadoon[m]1> Guys there's someone offering their Blackbird with an 8-core for sale | 20:46 |
| openpowerbot | [irc] <sadoon[m]1> It's cheseman on Talos_Workstation | 20:46 |
| openpowerbot | [irc] <sadoon[m]1> If you have the funds do pick it up, will be very useful | 20:46 |
| lkcl | toshywoshy ^ | 20:47 |
| openpowerbot | [irc] <sadoon[m]1> I wish I could take it myself but I don't have the budget rn | 20:47 |
| openpowerbot | [irc] <sadoon[m]1> Speaking of which, toshywoshy: your 8-core should be in the UK within a week or so | 20:48 |
| openpowerbot | [irc] <sadoon[m]1> Missed my brother's flight but luckily his roommate leaves soon so I'll hand it to him instead | 20:48 |
| openpowerbot | [irc] <sadoon[m]1> I skimmed through the DDR3 source from the repo I sent, looks good so far | 20:49 |
| openpowerbot | [irc] <sadoon[m]1> We might be in luck if this works | 20:49 |
| openpowerbot | [irc] <sadoon[m]1> Especially since it's designed with Xilinx boards in mind | 20:50 |
| openpowerbot | [irc] <lkcl_> sadoon[m]1, https://github.com/waviousllc/wav-lpddr-hw | 20:51 |
| openpowerbot | [irc] <lkcl_> already done. multiple times. | 20:51 |
| openpowerbot | [irc] <sadoon[m]1> Wow, another gold mine | 20:51 |
| openpowerbot | [irc] <lkcl_> and associated firmware for training https://github.com/waviousllc/wav-lpddr-sw | 20:51 |
| openpowerbot | [irc] <sadoon[m]1> Can these run at very low clocks though like the DDR3 one? | 20:53 |
| openpowerbot | [irc] <lkcl_> please - really - don't spend excessive time on this, apart from learning/confirming that yes, it is an absolutely massive costly project whatever the route chosen | 20:54 |
| openpowerbot | [irc] <lkcl_> that's what LPDDR4/5 are specifically designed to do, yes. | 20:54 |
| openpowerbot | [irc] <sadoon[m]1> If the bulk of the work has already been done, we might just be in luck Luke :) | 20:54 |
| openpowerbot | [irc] <lkcl_> there are *additional commands* added over-and-above the DDR3 command-set that crank the clock rate down | 20:54 |
| openpowerbot | [irc] <sadoon[m]1> No need to reinvent the wheel | 20:54 |
| openpowerbot | [irc] <lkcl_> no... you're not quite following and i have spent too long explaining this multiple times, so please don't keep asking me to do it, please "prune this branch of investigation" | 20:55 |
| openpowerbot | [irc] <lkcl_> *even the verification and testing* is itself massively-expensive | 20:55 |
| openpowerbot | [irc] <lkcl_> when you have a "working" PHY *just getting it up and running* - no modifications just doing simulations and FPGA bringup - is incredibly costly | 20:56 |
| openpowerbot | [irc] <lkcl_> you normally think in terms of a software library, "just built it, read the API, plug it in to my app and get going" | 20:58 |
| openpowerbot | [irc] <lkcl_> that's nooowheeerre near an appropriate "handle / assumption" to begin from, unfortunately: it's a yawning chasm | 20:58 |
| openpowerbot | [irc] <lkcl_> plus in that particular case, "PHY" is just the "interface to the DRAM IC". it is *not* also the *controller*. | 21:01 |
| openpowerbot | [irc] <sadoon[m]1> If someone has created a fully functional memory controller for board X, we could use Jacob's idea of interfacing and then all the testing we need to do would be to connect up the two boards | 21:01 |
| openpowerbot | [irc] <lkcl_> there is an interface called... DFI | 21:01 |
| openpowerbot | [irc] <sadoon[m]1> The DDR3 one is fully features | 21:01 |
| openpowerbot | [irc] <sadoon[m]1> Featured* | 21:01 |
| openpowerbot | [irc] <lkcl_> you also need to track down a DFI-to-Wishbone or DFI-to-AXI or DFI-to-whatever "Controller" | 21:01 |
| openpowerbot | [irc] <sadoon[m]1> They even ran Linux using it | 21:01 |
| openpowerbot | [irc] <sadoon[m]1> It would at least give us 1GB of real RAM to test with | 21:02 |
| openpowerbot | [irc] <lkcl_> i have removed that task from #961. it wasn't authorized and we have far higher priority tasks to get completed before we can go anywhere near a new NLnet Grant request | 21:02 |
| openpowerbot | [irc] <lkcl_> in one year's time, yes. | 21:02 |
| openpowerbot | [irc] <sadoon[m]1> That sounds good, one year's time yeah | 21:03 |
| openpowerbot | [irc] <lkcl_> one year from now, at least - because there is approx 6 months of *existing* grant work to get done before i am comfortable applying for a new grant | 21:03 |
| openpowerbot | [irc] <sadoon[m]1> Yeah no I do agree there of course | 21:03 |
| openpowerbot | [irc] <lkcl_> at which point from experience it will be about 4-6 months from application to MoU signing | 21:03 |
| openpowerbot | [irc] <lkcl_> and then there is 6 months work | 21:03 |
| openpowerbot | [irc] <lkcl_> so actually about.... estimated.... 14-18 months from now the goal "1 GB of real RAM to test with" is achieved | 21:04 |
| openpowerbot | [irc] <lkcl_> and in the meantime there is HyperRAM which is easy and far less costly. | 21:04 |
| openpowerbot | [irc] <lkcl_> *and* i can persuade NLnet to put it into someone else's *existing* Grant. | 21:04 |
| openpowerbot | [irc] <lkcl_> (to get the higher-capacity HyperRAM PMODs) | 21:05 |
| openpowerbot | [irc] <lkcl_> see how that works? | 21:05 |
| openpowerbot | [irc] <lkcl_> don't let me discourage you from finding things - please make certain to always edit the wiki to include any new PHY/Controller research and/or actual FOSSHW implementations | 21:08 |
| openpowerbot | [irc] <lkcl_> https://libre-soc.org/shakti/m_class/DDR/ | 21:08 |
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| openpowerbot | [irc] <programmerjake> implementing the ram via another computer idea is likely less expensive than getting custom hyperram boards and shipping them to everyone... | 21:11 |
| openpowerbot | [irc] <sadoon[m]1> lkcl_: Will do | 21:13 |
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