Recent changes to this wiki:

move MTCRF RS to 1st operand


Changed pages:
openpower/isatables/minor 31.csv
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Changed pages:
cole
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move RS to position 1 on ALU (OP_EXTS)


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openpower/isatables/minor 31.csv
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move RS to reg1 for LOGICAL pipeline


Changed pages:
openpower/isatables/major.csv openpower/isatables/minor 31.csv
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cmpb does not store result in CR (cmpeqb and cmp do)


Changed pages:
openpower/isatables/minor 31.csv
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PowerPC Notebook
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index
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Revert "Add variants of setbc"

Apparently it's not supported by the power assembler. who knew?
This reverts commit eb6dcf77049b0d2e4fff1e7ed7e953be83f3d70b.


Changed pages:
openpower/isatables/minor 31.csv
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Add variants of setbc


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openpower/isatables/minor 31.csv
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Add OP_SETB


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openpower/isatables/minor 31.csv
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openpower/isa
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resources
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index
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Cesar Strauss
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no CR for MFMSR


Changed pages:
openpower/isatables/minor 31.csv
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add missing OP_MFMSR and OP_MTMSRD


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openpower/isatables/minor 31.csv
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mnolan
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mnolan
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addw
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Cesar Strauss
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Cesar Strauss
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jock tanner
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mnolan
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tplaten
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programmerjake
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Yehowshua Immanuel
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Yehowshua Immanuel
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lkcl
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cole
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about us
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shift


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3d gpu/architecture/compunit
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3d gpu/architecture
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Cesar Strauss
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Cesar Strauss
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Cesar Strauss
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Cesar Strauss
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Tasks 1 and 2 are in progress.


Changed pages:
Cesar Strauss
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Update my tasks, ordered by priority


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Cesar Strauss
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document regspecs


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3d gpu/architecture/regfile
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update CSS for code block


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local.css
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add regspec description in regfile


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3d gpu/architecture/regfile
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hilarious. BC for isel was in the right place all along


Changed pages:
openpower/isatables/minor 31.csv
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annoying. isel needs to be split into separate CSV if done as group-match


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openpower/isatables/minor 31.csv
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make 3rd reg for isel NONE however set CRin to BC


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openpower/isatables/minor 31.csv
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move isel to CR


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openpower/isatables/minor 31.csv
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shrink isel down to group pattern


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openpower/isatables/minor 31.csv
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Changed pages:
mnolan
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Fix CR0 usage for OP_CNTZ


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openpower/isatables/minor 31.csv
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Fix OP_MCRF


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openpower/isatables/minor 19.csv
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Add myself to the team page


Changed pages:
about us
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Add current status


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Cesar Strauss
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Create skeleton of my page


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Cesar Strauss
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mnolan
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mnolan
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mnolan
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add 6600 scoreboard fu-regs image


Changed pages:
3d gpu/6600 scoreboard fu regs.png
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move DIV and MOD to DIV Function Unit, MUL to MUL Function Unit


Changed pages:
openpower/isatables/major.csv openpower/isatables/minor 31.csv
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Fix opcodes for TWI, TDI, TW, and TD


Changed pages:
openpower/isatables/major.csv openpower/isatables/minor 31.csv
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mention SPR and other pipelines


Changed pages:
openpower/pipeline operands
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split out system calls from branch pipeline


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openpower/pipeline operands
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add rfid instruction to opcode minor 19


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openpower/isatables/minor 19.csv
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mention auto-install scripts


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HDL workflow
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mention dev-env-scripts


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HDL workflow
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Add decoding for bpermd opcode to table


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openpower/isatables/minor 31.csv
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add XER rules


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openpower/pipeline operands
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clarification on 6600


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3d gpu/architecture/6600scoreboard
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add header section to 6600 page


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3d gpu/architecture/6600scoreboard
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link page on pipeline operands


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3d gpu/architecture/pipeline operands openpower openpower/pipeline operands
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whitespace, link to tomasulo transform page


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3d gpu/architecture
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Add git "submodule init" and "submodule update" for soc


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index
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Fix script error


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index
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add DAG equivalence para


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3d gpu/architecture/tomasulo transformation
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add context on article


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3d gpu/architecture/tomasulo transformation
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change numbering on article


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3d gpu/architecture/tomasulo transformation
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notes on how to transform from tomasulo to scoreboard


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3d gpu/architecture/tomasulo transformation
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add shift pipeline operand in/out table


Changed pages:
3d gpu/architecture/pipeline operands
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