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Questions and Comments

  • Cole: We claim that our first product will be a GbE router featuring up to to USB 2 ports. The maximum bandwidth of USB2 is 480Mb/s whereas the maximum bandwidth of USB3 is 5Gb/s. Is this a typo? or is the plan to provide 0.96Gb/s total, 0.48Gb/s to each of the two USB ports?

lkcl: 5 gigabit ethernet ports. 2 USB2 ports. this is 7 ports.

Cole: Thanks for the clarification this makes sense. The edit you made to this description on the page is more clear than its previous form.

Wording from Lauri

Something like this:

The open development model and freely licensed end product would allow a skilled competitor to copy us before our product is out. However, given the startup costs involved, they would only do so for highly lucrative markets. Otherwise they would copy the product only once it has proven successful, giving us a lead time of several years.

The markets where core licensing cost is significant, and volumes sufficient are roughly: - ESP-like internet-of-things - digital set-top box/mini console - low-end phones

Our core is expected to have a die area of XX mm2 at XX nm. The ESP series is around 0.15 mm2 at 90nm; each mm2 on older nodes costs on the order of 0.05$ (0.25$ for 5nm) for the wafer alone. For ESP-like applications, the core being free would not offset the larger area.

Set-top-boxes or mini consoles would be a viable target for them only once driver support existed. Copying us in-progress would show such high confidence in us that they'd be better off investing in us directly.

Low-end phones rely on the modem being integrated. Integration work may only begin in earnest once the core is relatively far along, losing them some time edge; and before they have the core and modem integrated, they can't assess the total power usage, necessary for this market.