Open Tape-out Dev, November 6-7 2021
- https://opentapeout.dev/
- Jean-Paul Chaput presenting about coriolis2 https://youtu.be/sunruF6ryso?t=4338
- Luke Leighton about Libre-SOC https://youtu.be/sunruF6ryso?t=6749
- https://twitter.com/OTapeout
- Nov 6th-7th, 2021, 19:00 to 21:00 CET (Central European Time: Amsterdam / Paris / Brussels)
Coriolis, a FOSS RTL-to-GDSII Toolchain
by Jean-Paul Chaput, bio:
Coriolis, a FOSS RTL-to-GDSII Toolchain Jean-Paul Chaput holds a Master Degree in MicroElectronics and Software Engineering. He joined the LIP6 laboratory within SU (formerly UPMC) in 2000. Currently he is a Research Engineer in the Analog and Mixed Signal Team at LIP6. His main focus is on physical level design software. He is a key contributor in developing and maintaining the Alliance/Coriolis VLSI CAD projects for CMOS technologies. In particular he contributed in developing the routers of both Alliance/Coriolis and the whole Coriolis toolchain infrastructure. He his now a key contributor in extending Alliance/Coriolis to the Analog Mixed-Signal integration for nanometric CMOS technologies.
Libre-SOC
by Luke Leighton. bio:
Luke Kenneth Casson Leighton specialises in Libre Ethical Technology. He has been using, programming and reverse-engineering computing devices continuously for 44 years, has a BEng (Hons), ACGI, in Theory of Computing from Imperial College, and recently put that education to good use in the form of the Libre-SOC Project: an entirely Libre-Licensed 3D Hybrid CPU-VPU-GPU based on OpenPOWER. He writes poetry and has been developing a HEP Physics theory for the past 36 years in his spare time.
Abstract: Overview of the Libre-SOC Project
The Libre-SOC Project aims to provide a mass-volume processor with 3D and Video capability built-in to the ISA, for use in end-user products such as smartphones netbooks chromebooks tablets and Industrial SBC/IoT. It is a massive project, starting small and being developed "smart".
Why it is being created - at all - can be easily guaged by examining the littering of systematic failures by multiple large Corporations: Intel Management Engine, Qualcomm leaving 40% of the world's smartphones vulnerable to hijacking, Apple drive-by WIFI zero-exploits, Supermicro de-listed from NASDAQ, Huawei, Smartphones shipping by default with Trojans, and many others.
Efforts to fix this (Fairphone) simply do not go far back enough down the chain. Just as Google sees the only solution to Rowhammer to be to create a Libre/Open LPDDR4 Memory PHY and Controller (because the existing RTL providers cannot be trusted to solve it properly), we see the only solution to be to take full responsibility for creating a suitable full-on Embedded high-end multi-core System-on-a-Chip, done entirely Libre.
This talk will therefore provide a high-level overview into some of the technical decisions behind the "why", in order to achieve such a ridicuously-ambitious goal in a "smarter" (rather than "work harder") innovative way.
Those who only know what they do, work harder. Those who also
know WHY they do what they do, work smarter.
Simon Sinek
URLs for the talk
- https://libre-soc.org/
- https://libre-soc.org/conferences/opentapeoutdev2021/
- https://git.libre-soc.org/
- http://lists.libre-soc.org/mailman/listinfo
- https://bugs.libre-soc.org/buglist.cgi?quicksearch=nlnet%20milestone&list_id=2583
- https://libre-soc.org/nlnet_proposals/
- https://libre-soc.org/180nm_Oct2020/ls180/
- https://libre-soc.org/180nm_Oct2020/ls180.svg
- https://libre-soc.org/3d_gpu/architecture/dynamic_simd/
- https://git.libre-soc.org/?p=nmutil.git;a=tree;f=src/nmutil;hb=HEAD
- https://git.libre-soc.org/?p=nmutil.git;a=blob;f=src/nmutil/stageapi.py;hb=HEAD
- https://git.libre-soc.org/?p=nmutil.git;a=blob;f=src/nmutil/singlepipe.py;hb=HEAD
- https://www.chisel-lang.org/api/3.4.3/chisel3/util/index.html
- https://docs.libre-soc.org/nmutil/genindex.html
- https://libre-soc.org/3d_gpu/architecture/regfile/
- https://git.libre-soc.org/?p=soc.git;a=blob;f=src/soc/simple/core.py;hb=HEAD
- https://git.libre-soc.org/?p=openpower-isa.git;a=blob;f=src/openpower/decoder/power_decoder.py;hb=HEAD
- https://git.libre-soc.org/?p=openpower-isa.git;a=blob;f=openpower/isatables/minor_19.csv;hb=HEAD
- https://git.libre-soc.org/?p=openpower-isa.git;a=blob;f=openpower/isatables/fields.text;hb=HEAD
- https://bugs.libre-soc.org/show_bug.cgi?id=739
- https://libre-soc.org/crypto_router_pinmux/
Open Source ASIC Conference Survey, May 2021
We are thinking about putting together a conference. To help us plan it, please answer the following questions
- https://forms.gle/BdLWdyryLJbj8kY9A