Store Byte

D-Form

• stb RS,D(RA)

Pseudo-code:

b <- (RA|0)
EA <- b + EXTS(D)
MEM(EA, 1) <- (RS)[XLEN-8:XLEN-1]

Special Registers Altered:

None

Store Byte Indexed

X-Form

• stbx RS,RA,RB

Pseudo-code:

b <- (RA|0)
EA <- b + (RB)
MEM(EA, 1) <- (RS)[XLEN-8:XLEN-1]

Special Registers Altered:

None

Store Byte with Update

D-Form

• stbu RS,D(RA)

Pseudo-code:

EA <- (RA) + EXTS(D)
MEM(EA, 1) <- (RS)[XLEN-8:XLEN-1]
RA <- EA

Special Registers Altered:

None

Store Byte with Update Indexed

X-Form

• stbux RS,RA,RB

Pseudo-code:

EA <- (RA) + (RB)
MEM(EA, 1) <- (RS)[XLEN-8:XLEN-1]
RA <- EA

Special Registers Altered:

None

Store Halfword

D-Form

• sth RS,D(RA)

Pseudo-code:

b <- (RA|0)
EA <- b + EXTS(D)
MEM(EA, 2) <- (RS)[XLEN-16:XLEN-1]

Special Registers Altered:

None

Store Halfword Indexed

X-Form

• sthx RS,RA,RB

Pseudo-code:

b <- (RA|0)
EA <- b + (RB)
MEM(EA, 2) <- (RS)[XLEN-16:XLEN-1]

Special Registers Altered:

None

Store Halfword with Update

D-Form

• sthu RS,D(RA)

Pseudo-code:

EA <- (RA) + EXTS(D)
MEM(EA, 2) <- (RS)[XLEN-16:XLEN-1]
RA <- EA

Special Registers Altered:

None

Store Halfword with Update Indexed

X-Form

• sthux RS,RA,RB

Pseudo-code:

EA <- (RA) + (RB)
MEM(EA, 2) <- (RS)[XLEN-16:XLEN-1]
RA <- EA

Special Registers Altered:

None

Store Word

D-Form

• stw RS,D(RA)

Pseudo-code:

b <- (RA|0)
EA <- b + EXTS(D)
MEM(EA, 4) <- (RS)[XLEN-32:XLEN-1]

Special Registers Altered:

None

Store Word Indexed

X-Form

• stwx RS,RA,RB

Pseudo-code:

b <- (RA|0)
EA <- b + (RB)
MEM(EA, 4) <- (RS)[XLEN-32:XLEN-1]

Special Registers Altered:

None

Store Word with Update

D-Form

• stwu RS,D(RA)

Pseudo-code:

EA <- (RA) + EXTS(D)
MEM(EA, 4) <- (RS)[XLEN-32:XLEN-1]
RA <- EA

Special Registers Altered:

None

Store Word with Update Indexed

X-Form

• stwux RS,RA,RB

Pseudo-code:

EA <- (RA) + (RB)
MEM(EA, 4) <- (RS)[XLEN-32:XLEN-1]
RA <- EA

Special Registers Altered:

None

Store Doubleword

DS-Form

• std RS,DS(RA)

Pseudo-code:

b <- (RA|0)
EA <- b + EXTS(DS || 0b00)
MEM(EA, 8) <- (RS)

Special Registers Altered:

None

Store Doubleword Indexed

X-Form

• stdx RS,RA,RB

Pseudo-code:

b <- (RA|0)
EA <- b + (RB)
MEM(EA, 8) <- (RS)

Special Registers Altered:

None

Store Doubleword with Update

DS-Form

• stdu RS,DS(RA)

Pseudo-code:

EA <- (RA) + EXTS(DS || 0b00)
MEM(EA, 8) <- (RS)
RA <- EA

Special Registers Altered:

None

Store Doubleword with Update Indexed

X-Form

• stdux RS,RA,RB

Pseudo-code:

EA <- (RA) + (RB)
MEM(EA, 8) <- (RS)
RA <- EA

Special Registers Altered:

None

Store Quadword

DS-Form

• stq RSp,DS(RA)

Pseudo-code:

b <- (RA|0)
EA <- b + EXTS(DS || 0b00)
MEM(EA, 16) <- RSp

Special Registers Altered:

None

Store Halfword Byte-Reverse Indexed

X-Form

• sthbrx RS,RA,RB

Pseudo-code:

b <- (RA|0)
EA <- b + (RB)
MEM(EA, 2) <- (RS) [56:63] || (RS)[48:55]

Special Registers Altered:

None

Store Word Byte-Reverse Indexed

X-Form

• stwbrx RS,RA,RB

Pseudo-code:

b <- (RA|0)
EA <- b + (RB)
MEM(EA, 4) <- ((RS)[56:63] || (RS)[48:55] || (RS)[40:47]
               ||(RS)[32:39])

Special Registers Altered:

None

Store Doubleword Byte-Reverse Indexed

X-Form

• stdbrx RS,RA,RB

Pseudo-code:

b <- (RA|0)
EA <- b + (RB)
MEM(EA, 8) <- ((RS) [56:63] || (RS)[48:55]
                || (RS)[40:47] || (RS)[32:39]
                || (RS)[24:31] || (RS)[16:23]
                || (RS)[8:15]  || (RS)[0:7])

Special Registers Altered:

None

Store Multiple Word

D-Form

• stmw RS,D(RA)

Pseudo-code:

b <- (RA|0)
EA <- b + EXTS(D)
r <- RS[0:63]
do while r <= 31
    MEM(EA, 4) <- GPR(r)[32:63]
    r <-  r + 1
    EA <-  EA + 4

Special Registers Altered:

None