# fclass

In SV just as with fcvt single precision is to be considered half-of-elwidth precision. Thus when elwidth=FP32 fptstsp will test half that precision, at FP16.

based on xvtstdcsp v3.0B p768 the instruction performs analysis of the FP number to determine if it is Infinity, NaN, Denormalised or Zero and if so which sign.

unlike xvtstdcsp the result is stored in a Condition Register specified by BF. this allows it to be used as a predicate mask. setb may be used to create the equivalent of xvtstdcsp if desired.

0.5 6..10 11.15 16.20 21...30 31 name
PO BF/dx FRA dc XO dm fptstsp
``````DCMX <- dc || dm || dx
src  <- (FRA)[32:63]
sign  <- src
exponent  <- src[1:8]
fraction  <- src[9:31]
class.Infinity  <- (exponent = 0xFF) & (fraction = 0)
class.NaN  <- (exponent = 0xFF) & (fraction != 0)
class.Zero  <- (exponent = 0x00) & (fraction = 0)
class.Denormal  <- (exponent = 0x00) & (fraction != 0)
CR{BF} <- ((DCMX & class.NaN & !sign)  |
(DCMX & class.NaN & sign))  ||
((DCMX & class.Denormal & !sign) |
(DCMX & class.Denormal & sign)) ||
((DCMX & class.Infinity & !sign) |
(DCMX & class.Infinity & sign)) ||
((DCMX & class.Zero & !sign) |
(DCMX & class.Zero & sign))
``````

64 bit variant fptstdp is as follows:

``````sign <- src.bit
exponent <- src.bit[1:11]
fraction <- src.bit[12:63]
exponent & 7FF
``````