• shakti
  • m class
  • HyperRAM
  • Edit
  • RecentChanges
  • Preferences
  • About Us

HyperRAM (Octal SPI)

  • https://github.com/blackmesalabs/hyperram
  • Symbiotic EDA have a DDR variant that they can make libre for the right $
  • Litex Hub https://github.com/litex-hub/litehyperbus
  • https://github.com/zeldin/litehyperram
  • VHDL hyperram https://github.com/MJoergen/HyperRAM
  • HyperRAM
  • https://www.infineon.com/dgdl/Infineon-AN226576_Getting_Started_with_HyperRAM-ApplicationNotes-v02_00-EN.pdf?fileId=8ac78c8c7cdc391c017d0d398e9166de
Link
Sitemap
Crowdsupply Updates
OpenCollective
Librecores
Libre-SOC Wikipedia
Simple-V OpenPOWER Draft
OpenPOWER External RFCs
PyPI packages
Hackaday
conferences
HDL workflow
Documentation
Bugs and Tasks
All Mailing Lists
List Archives
Git repositories
Kazan (Vulkan driver)
Libre-SOC charter
m class
3D GPU
VPU
Micro-Architecture
future feature proposals
standards
nlnet proposals
resources
Sandbox
Upcoming tasks
NLNet Milestones
180nm Oct2020
22nm PowerPI
Links: HDL workflow/HyperRAM Last edited Fri Jul 7 06:09:58 2023.