Luke Kenneth Casson Leighton (lkcl)

Status Tracking

Currently working on

  • Bug #24: pinmux memory map
  • Bug #26: pinmux default mux values
  • Bug #34: pinmux add sdram interface
  • Bug #36: pinmux split out #defines from bsv to includes
  • Bug #432: mulld pseudocode overflow calculation incorrect
  • Bug #448: MUL pipeline unit tests
  • Bug #587: create setvl pseudocode, v3.0B fields, SVL-Form, and csv file
  • Bug #609: set SVSTATE over DMI and JTAG interface
  • Bug #924: potential major opcode allocation for SVP64
  • Bug #936: change the spec so RC1=1 fail-first instructions always write all outputs up to and including failing subvector
  • Bug #937: instructions for bigint shift and prefix-code encode
  • Bug #946: insndb: investigate and possibly fix instructions missing in CSVs
  • Bug #960: Final Report on OPF ISA External RFC ls003 - maddedu, maddedus, divmod2du, dsld, dsrd
    • this task is part of MoU Milestone Bug #1013
  • Bug #1021: OPF ISA Schedule A preparation planning and creation of tasks
  • Bug #1025: create IEEE754 FP Pipelines and decoder for TestIssuer
    • this task is a MoU Milestone
  • Bug #1039: add hardware-cycle-accurate stastistical modelling to ISACaller for an in-order core
    • this task is a MoU Milestone
  • Bug #1047: SVP64 LD/ST Data-Dependent Fail-First providing linked-list walking
    • this task is part of MoU Milestone Bug #1027
  • Bug #1228: SFFS ISACaller userspace ELF support for dynamic linking and PIC and statically-linked-glibc
    • this task is a MoU Milestone
  • Bug #1231: glibc needs dcbt
  • Bug #1235: resolve openpower-isa repository screwups

Completed but not yet added to payees list

  • Bug #48: Complete IEEE754 floating point pipeline
    • this task is a MoU Milestone
  • Bug #50: nmigen pinmux
    • this task is a MoU Milestone
  • Bug #62: nmigen-based general-purpose util / data handling / io-control library needed
    • this task is a MoU Milestone
  • Bug #81: implement 6600-style "precise" out-of-order scoreboard
    • this task is a MoU Milestone
  • Bug #122: FP software emulation needed,
    • this task is part of MoU Milestone Bug #48
  • Bug #132: SIMD-like nmigen signal for partitioning
    • this task is part of MoU Milestone Bug #62
  • Bug #137: NLNet 2019 Video Acceleration Proposal 2019-10-031
  • Bug #138: NLNet 2019 Coriolis2 Layout proposal 2019-10-029
  • Bug #140: Implement MESA 3D Vulkan Driver NLNet 2019-10-042
  • Bug #172: partitioned signal add/sub/neg
    • this task is part of MoU Milestone Bug #48
  • Bug #175: NLNet 2019 Wishbone proposal 2019-10-043
  • Bug #191: NLNet 2019 Core Proposal 2019-02-012
  • Bug #195: Formal correctness framework is needed for Power ISA
    • this task is a MoU Milestone
  • Bug #196: Formal correctness proof needed for the IEEE754 FPU
    • this task is a MoU Milestone
  • Bug #197: Formal correctness proof needed of the 6600-style Out-of-Order execution engine
    • this task is a MoU Milestone
  • Bug #201: create specifications for modifications needed for additional nmigen functionality.
    • this task is a MoU Milestone
  • Bug #234: Hardware implementation of video opcodes
    • this task is a MoU Milestone
  • Bug #242: OpenPOWER simulation unit tests are needed
    • this task is a MoU Milestone
  • Bug #243: Documentation budget for OpenPower Member discussion and proposals
    • this task is a MoU Milestone
  • Bug #249: Additional Wishbone B4 peripherals for Libre-SOC (including conversion from patented AXI4)
    • this task is a MoU Milestone
  • Bug #251: Initial 3D MESA non-accelerated software-only driver is needed
    • this task is a MoU Milestone
  • Bug #252: 3D accelerated opcodes need to be added to the POWER ISA simulator
    • this task is a MoU Milestone
  • Bug #254: Second iteration round for opcodes, simulation and hardware for 3D MESA
    • this task is a MoU Milestone
  • Bug #362: improvements to nmigen and yosys
    • this task is a MoU Milestone
  • Bug #384: Documentation for the Libre-SOC Power ISA Core and internal architecture
    • this task is a MoU Milestone
  • Bug #389: Review all diagrams on wiki for translation into SVG
    • this task is part of MoU Milestone Bug #384
  • Bug #469: Create D-cache from microwatt dcache.vhdl
    • this task is part of MoU Milestone Bug #51
  • Bug #550: binutils support needed for svp64
    • this task is part of MoU Milestone Bug #577
  • Bug #577: gcc compiler, binutils and assembly macros for OpenPOWER-SV
    • this task is a MoU Milestone
  • Bug #690: NGI POINTER Gigabit Router ASIC, top level milestone
  • Bug #714: Coriolis2 Installation as Normal User Script
    • this task is part of MoU Milestone Bug #384
  • Bug #728: ISACaller needs a cleanup and partial re-factoring
    • this task is part of MoU Milestone Bug #241
  • Bug #748: NLnet toplevel Milestone 2021-08-049 coriolis2
  • Bug #763: Work on I/O Core Pad JTAG Tests
    • this task is part of MoU Milestone Bug #50
  • Bug #771: Creation of Cryptographic-Primitive OpenPower ISA Pseudo-code
    • this task is a MoU Milestone
  • Bug #774: Equipment needed, such as FPGA boards and Ethernet PMODs
    • this task is a MoU Milestone
  • Bug #775: Project Management
    • this task is a MoU Milestone
  • Bug #777: Add / documentation / relicense Tercel QSPI XIP core
    • this task is part of MoU Milestone Bug #50
  • Bug #795: No console output from ls2 builds
    • this task is part of MoU Milestone Bug #249
  • Bug #797: Add 10/100 OpenCores Ethernet MAC
    • this task is part of MoU Milestone Bug #249
  • Bug #801: ls2/gram DDR3 controller not working on hardware
    • this task is part of MoU Milestone Bug #249
  • Bug #813: FPGA Simulation
    • this task is part of MoU Milestone Bug #814
  • Bug #814: NGI POINTER Milestone 2
    • this task is a MoU Milestone
  • Bug #819: Complete the conversion to Python 3,
    • this task is a MoU Milestone
  • Bug #821: Servers for running coriolis2 VLSI layout
    • this task is part of MoU Milestone Bug #814
  • Bug #850: NGI POINTER Milestone 3
    • this task is a MoU Milestone
  • Bug #863: AV opcode implementation, add to Decoder, CSV files
    • this task is part of MoU Milestone Bug #234
  • Bug #886: transcendentals opcode spec writeup needed
    • this task is part of MoU Milestone Bug #255
  • Bug #892: donations from purism
    • this task is a MoU Milestone
  • Bug #896: DOUBLE2SINGLE doesn't handle generating the return value for inf/nan inputs
    • this task is part of MoU Milestone Bug #252
  • Bug #912: NGI POINTER Milestone 4
    • this task is a MoU Milestone
  • Bug #929: maddld and friends incorrectly ignored by sv_analysis.py
    • this task is a MoU Milestone
  • Bug #975: Payment for Jacob upgrading his PC to a Ryzen 7950X
    • this task is part of MoU Milestone Bug #774
  • Bug #981: Support PowerPC ABI in cavatools
    • this task is a MoU Milestone
  • Bug #997: sorting out task schedule and MoU
    • this task is part of MoU Milestone Bug #987
  • Bug #1029: presentation and explanation of ls003
    • this task is part of MoU Milestone Bug #1019

Payment not yet submitted

NLnet.2021.02A.052.CryptoRouter

  • Bug #1151: Ed25519 demo
    • €1500 which is the total amount
    • this task is part of MoU Milestone Bug #773
  • Bug #1155: O(n2) multiplication REMAP mode(s)
    • €300 out of total of €1000
    • this task is part of MoU Milestone Bug #773
  • Bug #1157: Implement poly1305
    • €300 out of total of €1500
    • this task is part of MoU Milestone Bug #773

MoU Milestone subtotals for not yet submitted payments

  • Bug #773: High-Level Demos of Cryptographic and Other Relevant Algorithms
    • subtotal €2100 out of total including subtasks of €5500

NLnet.2022-08-051.OPF

  • Bug #1048: OPF ISA External RFC ls011 - Fixed and Floating point LD/ST-with-update EXT2xx instructions
    • €2000 out of total of €2500
    • this task is part of MoU Milestone Bug #1009
  • Bug #1049: implement Fixed and Floating point LD/ST-with-update postincrement EXT2xx instructions in ISACaller
    • €3000 which is the total amount
    • this task is part of MoU Milestone Bug #1011
  • Bug #1053: Separate Vector CRs containing CR8-CR127 from Scalar CR containing CR0-CR7
    • €1200 out of total of €1500
    • this task is part of MoU Milestone Bug #1011
  • Bug #1054: questions and feedback (v2) on OPF RFC ls012
    • €1000 out of total of €2500
    • this task is part of MoU Milestone Bug #1012
  • Bug #1076: External OPF ISA WG RFC ls016 - DCT/FFT twin-butterfly instructions
    • €2000 which is the total amount
    • this task is part of MoU Milestone Bug #1009
  • Bug #1089: feedback on OPF SVP64 RFC for "managment" instructions: ls008
    • €1250 out of total of €2500
    • this task is part of MoU Milestone Bug #1012

MoU Milestone subtotals for not yet submitted payments

  • Bug #1009: Write and submit 1st Draft External RFCs
    • subtotal €4000 out of total including subtasks of €34000

MoU Milestone subtotals for not yet submitted payments

  • Bug #1011: OPF ISA WG Draft RFC Research
    • subtotal €4200 out of total including subtasks of €19000

MoU Milestone subtotals for not yet submitted payments

  • Bug #1012: Iterative OPF ISA WG questions, feedback, and re-submission
    • subtotal €2250 out of total including subtasks of €22000

NLnet.2022-08-107.ongoing

  • Bug #852: implement grevlut*
    • €800 out of total of €2000
    • this task is part of MoU Milestone Bug #1027
  • Bug #1004: FPGA bring up for platform definitions
    • €400 out of total of €1500
    • this task is part of MoU Milestone Bug #1037
  • Bug #1026: implement Draft Instructions in nmigen HDL
    • €2000 out of total of €5000
    • this task is a MoU Milestone
  • Bug #1031: implement CRweird instructions in ISACaller
    • €2200 out of total of €3000
    • this task is part of MoU Milestone Bug #1027
  • Bug #1033: Implementation and enhancement of "Test API"
    • €500 out of total of €2500
    • this task is a MoU Milestone
  • Bug #1034: implement crternlogi crbinlog and binlog in ISACaller
    • €1700 out of total of €3000
    • this task is part of MoU Milestone Bug #1027
  • Bug #1036: Formal Proof for LDSTCompUnit is needed
    • €600 out of total of €3000
    • this task is a MoU Milestone
  • Bug #1039: add hardware-cycle-accurate stastistical modelling to ISACaller for an in-order core
    • €1500 out of total of €3000
    • this task is a MoU Milestone
  • Bug #1039: add hardware-cycle-accurate stastistical modelling to ISACaller for an in-order core
    • €1300 out of total of €3000
    • this task is a MoU Milestone
  • Bug #1047: SVP64 LD/ST Data-Dependent Fail-First providing linked-list walking
    • €3000 which is the total amount
    • this task is part of MoU Milestone Bug #1027
  • Bug #1079: make LD/ST-with-update EXTRA3
    • €1000 out of total of €2000
    • this task is part of MoU Milestone Bug #1003
  • Bug #1116: evaluate, spec, and implement Vector-Immediates in SVP64 Normal
    • €1000 out of total of €2000
    • this task is part of MoU Milestone Bug #1027
  • Bug #1150: implement PO9 changeover and associated tasks
    • €4000 out of total of €10000
    • this task is a MoU Milestone
  • Bug #1183: add /mrr mode (reverse mode) to Data-Dependent Fail-First CR_ops and "single looping" to DDFFirst in general
    • €3500 out of total of €6000
    • this task is part of MoU Milestone Bug #1027

MoU Milestone subtotals for not yet submitted payments

  • Bug #1027: implement "necessary" additions to SVP64 and Scalar Power ISA
    • subtotal €12200 out of total including subtasks of €30000

MoU Milestone subtotals for not yet submitted payments

  • Bug #1037: improvements of Libre-SOC core support on FPGA boards
    • subtotal €400 out of total including subtasks of €6000

MoU Milestone subtotals for not yet submitted payments

  • Bug #1026: implement Draft Instructions in nmigen HDL
    • subtotal €2000 out of total including subtasks of €8000

MoU Milestone subtotals for not yet submitted payments

  • Bug #1033: Implementation and enhancement of "Test API"
    • subtotal €500 out of total including subtasks of €2500

MoU Milestone subtotals for not yet submitted payments

  • Bug #1036: Formal Proof for LDSTCompUnit is needed
    • subtotal €600 out of total including subtasks of €3000

MoU Milestone subtotals for not yet submitted payments

  • Bug #1039: add hardware-cycle-accurate stastistical modelling to ISACaller for an in-order core
    • subtotal €2800 out of total including subtasks of €3000

MoU Milestone subtotals for not yet submitted payments

  • Bug #1003: instruction database continuation and binutils, SVP64
    • subtotal €1000 out of total including subtasks of €10500

MoU Milestone subtotals for not yet submitted payments

  • Bug #1150: implement PO9 changeover and associated tasks
    • subtotal €4000 out of total including subtasks of €10000

Submitted to NLNet but not yet paid

NLnet.2021-08-071.cavatools

  • Bug #979: Implement C-based Power ISA decoder compiler
    • submitted on 2023-09-10
    • €500 out of total of €5500
    • this task is a MoU Milestone

MoU Milestone subtotals for submitted but not yet paid payments

  • Bug #979: Implement C-based Power ISA decoder compiler
    • subtotal €500 out of total including subtasks of €5500

NLnet.2022-08-051.OPF

  • Bug #996: add shaddsw or replace shadduw with shaddsw since i32 indexes are waay more common than u32
    • submitted on 2023-06-22
    • €500 out of total of €2000
    • this task is part of MoU Milestone Bug #1011
  • Bug #1016: experiment reducing number of different instructions in int/fp move/convert
    • submitted on 2023-06-22
    • €500 out of total of €1500
    • this task is part of MoU Milestone Bug #1011
  • Bug #1023: crternlut/crbinlut analysis needed of CR regfile usage
    • submitted on 2023-06-22
    • €1200 out of total of €1500
    • this task is part of MoU Milestone Bug #1011
  • Bug #1043: ls009 research: DCT REMAP may have redundant modes
    • submitted on 2023-06-22
    • €1000 out of total of €2000
    • this task is part of MoU Milestone Bug #1011
  • Bug #1046: questions and re-submission of ls001 (SVP64 concept) PO9 Allocation proposal (as ls001.po9)
    • submitted on 2023-10-09
    • €3000 which is the total amount
    • this task is part of MoU Milestone Bug #1012
  • Bug #1051: OPF RFC ls012 research: create table of instructions and their priorities
    • submitted on 2023-06-22
    • €1300 out of total of €3500
    • this task is part of MoU Milestone Bug #1011
  • Bug #1056: questions and feedback (v2) on OPF RFC ls010 (Simple-V Zero-Overhead Loop Prefix Subsystem)
    • submitted on 2023-10-10
    • €2200 out of total of €3500
    • this task is part of MoU Milestone Bug #1012
  • Bug #1060: OPF RFC ls009 questions and feedback
    • submitted on 2023-10-09
    • €3200 out of total of €3500
    • this task is part of MoU Milestone Bug #1012
  • Bug #1063: consider removing predicate-result from SVP64
    • submitted on 2023-06-22
    • €750 out of total of €1500
    • this task is part of MoU Milestone Bug #1011
  • Bug #1090: feedback on OPF SVP64 RFC for "bigint" instructions: ls003.bignum
    • submitted on 2023-12-01
    • €1000 out of total of €2500
    • this task is part of MoU Milestone Bug #1012

MoU Milestone subtotals for submitted but not yet paid payments

  • Bug #1011: OPF ISA WG Draft RFC Research
    • subtotal €5250 out of total including subtasks of €19000

MoU Milestone subtotals for submitted but not yet paid payments

  • Bug #1012: Iterative OPF ISA WG questions, feedback, and re-submission
    • subtotal €9400 out of total including subtasks of €22000

Paid by NLNet

NLnet.2019.02.012

  • Bug #43: create an IEEE754 FP "sqrt"
    • paid on 2019-08-10
    • €480 out of total of €1200
    • this task is part of MoU Milestone Bug #48
  • Bug #44: IEEE754 FPU inverse (reciprocal) sqrt
    • paid on 2019-08-10
    • €600 out of total of €1500
    • this task is part of MoU Milestone Bug #48
  • Bug #63: queue (FIFO) library routine needed
    • paid on 2019-11-19
    • €400 out of total of €800
    • this task is part of MoU Milestone Bug #62
  • Bug #68: nmigen general utils needed
    • paid on 2019-11-19
    • €500 which is the total amount
    • this task is part of MoU Milestone Bug #62
  • Bug #71: option to replace SetAssocCache PLRU with random selection (LFSR)
    • paid on 2019-06-04
    • €250 out of total of €500
    • this task is a MoU Milestone
  • Bug #73: all nmigen module-based classes now need to derive from Elaboratable
    • paid on 2019-06-16
    • €500 which is the total amount
    • this task is a MoU Milestone
  • Bug #75: create an IEEE754 FP "add" pipeline
    • paid on 2019-06-04
    • €1500 which is the total amount
    • this task is part of MoU Milestone Bug #48
  • Bug #77: IEEE754 FP "mul" needed
    • paid on 2019-07-10
    • €2000 which is the total amount
    • this task is part of MoU Milestone Bug #48
  • Bug #78: IEEE754 FP "div" needed
    • paid on 2019-06-16
    • €1000 which is the total amount
    • this task is part of MoU Milestone Bug #48
  • Bug #86: 6600-style preliminary investigation
    • paid on 2019-06-04
    • €1000 which is the total amount
    • this task is part of MoU Milestone Bug #81
  • Bug #94: implement load/store memory dependency matrix
    • submitted on 2020-12-06
    • paid on 2020-12-20
    • €1500 which is the total amount
    • this task is part of MoU Milestone Bug #81
  • Bug #95: implement shadowing for use in precise exceptions, branch speculation, predication and WaW ordering
    • paid on 2019-06-16
    • €1000 which is the total amount
    • this task is part of MoU Milestone Bug #81
  • Bug #99: IEEE754 *pipelined* FPDIV unit needed
    • paid on 2019-08-10
    • €400 out of total of €1000
    • this task is part of MoU Milestone Bug #48
  • Bug #107: IEEE754 FPU FCVT "downconversion" needed
    • paid on 2019-07-10
    • €750 which is the total amount
    • this task is part of MoU Milestone Bug #48
  • Bug #108: IEEE754 FPU FCVT "upconversion" needed
    • paid on 2019-07-30
    • €250 which is the total amount
    • this task is part of MoU Milestone Bug #48
  • Bug #111: FCVT unsigned/signed char/short/int/long (8/16/32/64) to FP16/32/64 needed
    • paid on 2019-07-30
    • €125 which is the total amount
    • this task is part of MoU Milestone Bug #48
  • Bug #112: FCVT FP16/32/64 to unsigned/signed char/short/int/long (8/16/32/64) needed
    • paid on 2019-07-30
    • €125 which is the total amount
    • this task is part of MoU Milestone Bug #48
  • Bug #113: FCVT unit tests have too great a dynamic range
    • paid on 2020-03-12
    • €250 which is the total amount
    • this task is part of MoU Milestone Bug #48
  • Bug #117: RISCV FCLASS instruction needed
    • paid on 2019-07-30
    • €125 which is the total amount
    • this task is part of MoU Milestone Bug #48
  • Bug #127: Transcendentals needed (SIN/COS/ATAN2/EXP/LOG/POW etc.)
    • paid on 2020-03-12
    • €900 out of total of €1250
    • this task is part of MoU Milestone Bug #53
  • Bug #147: sv2nmigen now converts module headers
    • paid on 2020-01-28
    • €250 out of total of €1000
    • this task is part of MoU Milestone Bug #72
  • Bug #148: single chain pipeline API needed
    • paid on 2019-11-19
    • €750 out of total of €1500
    • this task is part of MoU Milestone Bug #62
  • Bug #171: partitioned comparison operators
    • paid on 2020-03-12
    • €200 out of total of €400
    • this task is part of MoU Milestone Bug #48
  • Bug #173: dynamic partitioned "shift"
    • paid on 2020-03-12
    • €350 out of total of €700
    • this task is part of MoU Milestone Bug #48
  • Bug #208: implement CORDIC in a general way sufficient to do transcendentals
    • submitted on 2020-12-06
    • paid on 2020-12-20
    • €750 which is the total amount
    • this task is part of MoU Milestone Bug #53
  • Bug #292: implement multi-way read/write 6600 signals
    • paid on 2020-04-28
    • €600 which is the total amount
    • this task is part of MoU Milestone Bug #81
  • Bug #412: set up litex for peripherals and linking to core
    • paid on 2020-09-04
    • €1200 out of total of €2000
    • this task is part of MoU Milestone Bug #22
  • Bug #485: Create I-Cache from microwatt icache.vhdl
    • submitted on 2022-06-16
    • paid on 2022-07-21
    • €1200 out of total of €1500
    • this task is part of MoU Milestone Bug #51
  • Bug #491: MMU Function Unit needed
    • submitted on 2022-06-16
    • paid on 2022-07-21
    • €450 out of total of €1450
    • this task is part of MoU Milestone Bug #51
  • Bug #538: development of Stage API and pipeline API
    • submitted on 2020-12-06
    • paid on 2020-12-20
    • €700 out of total of €1200
    • this task is part of MoU Milestone Bug #62
  • Bug #707: PartitionedSignal limited Cat function needed
    • submitted on 2021-12-09
    • paid on 2021-12-09
    • €250 which is the total amount
    • this task is part of MoU Milestone Bug #62
  • Bug #709: PartitionedSignal eq needs to be more sophisticated
    • submitted on 2021-12-09
    • paid on 2021-12-09
    • €300 which is the total amount
    • this task is part of MoU Milestone Bug #62
  • Bug #762: Peripheral Pin Muxing Development
    • submitted on 2022-06-16
    • paid on 2022-07-21
    • €100 out of total of €1600
    • this task is part of MoU Milestone Bug #50
  • Bug #790: dev-env-setup script for nextpnr-xilinx
    • submitted on 2022-06-16
    • paid on 2022-07-21
    • €150 out of total of €600
    • this task is part of MoU Milestone Bug #22
  • Bug #802: Document steps for ls2 microwatt hello world for fpga boards
    • submitted on 2022-06-16
    • paid on 2022-07-21
    • €150 out of total of €600
    • this task is part of MoU Milestone Bug #22

MoU Milestone subtotals for paid payments

  • Bug #48: Complete IEEE754 floating point pipeline
    • subtotal €8155 out of total including subtasks of €15525

MoU Milestone subtotals for paid payments

  • Bug #62: nmigen-based general-purpose util / data handling / io-control library needed
    • subtotal €2900 out of total including subtasks of €4550

MoU Milestone subtotals for paid payments

  • Bug #71: option to replace SetAssocCache PLRU with random selection (LFSR)
    • subtotal €250 out of total including subtasks of €500

MoU Milestone subtotals for paid payments

  • Bug #73: all nmigen module-based classes now need to derive from Elaboratable
    • subtotal €500 out of total including subtasks of €500

MoU Milestone subtotals for paid payments

  • Bug #81: implement 6600-style "precise" out-of-order scoreboard
    • subtotal €4100 out of total including subtasks of €4100

MoU Milestone subtotals for paid payments

  • Bug #53: design and software simulation of some of the 3D custom instructions needed for the GPU
    • subtotal €1650 out of total including subtasks of €2000

MoU Milestone subtotals for paid payments

  • Bug #72: verilog to nmigen converter (full or partial) needed
    • subtotal €250 out of total including subtasks of €1000

MoU Milestone subtotals for paid payments

  • Bug #22: FPGA proof-of-concept test needed
    • subtotal €1500 out of total including subtasks of €6125

MoU Milestone subtotals for paid payments

  • Bug #51: Virtual Memory Management system
    • subtotal €1650 out of total including subtasks of €4450

MoU Milestone subtotals for paid payments

  • Bug #50: nmigen pinmux
    • subtotal €100 out of total including subtasks of €6850

NLNet.2019.10.032.Formal

  • Bug #306: Formal Correctness Proof for ALU pipeline
    • paid on 2020-12-06
    • €400 out of total of €500
    • this task is part of MoU Milestone Bug #195
  • Bug #306: Formal Correctness Proof for ALU pipeline
    • submitted on 2022-08-28
    • paid on 2022-08-31
    • €100 out of total of €500
    • this task is part of MoU Milestone Bug #195
  • Bug #312: Formal Correctness Proof for CountZero needed (basically PriorityEncoder)
    • paid on 2020-08-21
    • €150 which is the total amount
    • this task is part of MoU Milestone Bug #198
  • Bug #331: Formal Correctness Proof for LOGICAL pipeline
    • submitted on 2020-12-06
    • paid on 2020-12-09
    • €300 out of total of €400
    • this task is part of MoU Milestone Bug #195
  • Bug #331: Formal Correctness Proof for LOGICAL pipeline
    • submitted on 2020-08-21
    • paid on 2020-08-21
    • €100 out of total of €400
    • this task is part of MoU Milestone Bug #195
  • Bug #332: Formal correctness proof needed for CR pipeline
    • paid on 2020-12-06
    • €300 which is the total amount
    • this task is part of MoU Milestone Bug #195
  • Bug #335: Formal Correctness Proof for Branch pipeline
    • submitted on 2020-12-06
    • paid on 2020-12-06
    • €300 out of total of €400
    • this task is part of MoU Milestone Bug #195
  • Bug #335: Formal Correctness Proof for Branch pipeline
    • submitted on 2020-12-06
    • paid on 2020-12-06
    • €100 out of total of €400
    • this task is part of MoU Milestone Bug #195
  • Bug #340: formal proof of POWER9 SHIFTROT pipeline needed
    • submitted on 2022-06-16
    • paid on 2022-09-06
    • €400 out of total of €2400
    • this task is part of MoU Milestone Bug #195
  • Bug #418: SPR pipeline formal correctness proof needed
    • submitted on 2022-09-05
    • paid on 2022-09-06
    • €350 out of total of €400
    • this task is part of MoU Milestone Bug #195
  • Bug #418: SPR pipeline formal correctness proof needed
    • submitted on 2021-04-24
    • paid on 2021-05-01
    • €50 out of total of €400
    • this task is part of MoU Milestone Bug #195
  • Bug #419: MUL pipeline formal proof needed
    • submitted on 2022-06-16
    • paid on 2022-09-06
    • €500 out of total of €550
    • this task is part of MoU Milestone Bug #195
  • Bug #419: MUL pipeline formal proof needed
    • submitted on 2021-04-24
    • paid on 2021-05-01
    • €50 out of total of €550
    • this task is part of MoU Milestone Bug #195
  • Bug #421: TRAP pipeline formal correctness proof needed
    • submitted on 2022-08-28
    • paid on 2022-08-31
    • €400 out of total of €500
    • this task is part of MoU Milestone Bug #195
  • Bug #421: TRAP pipeline formal correctness proof needed
    • paid on 2020-10-19
    • €100 out of total of €500
    • this task is part of MoU Milestone Bug #195
  • Bug #565: Improve formal verification on PartitionedSignal
    • submitted on 2022-08-28
    • paid on 2022-08-31
    • €300 out of total of €3000
    • this task is part of MoU Milestone Bug #196
  • Bug #578: python-based svp64 "generator" class
    • submitted on 2022-08-28
    • paid on 2022-08-31
    • €500 which is the total amount
    • this task is part of MoU Milestone Bug #577
  • Bug #834: binutils: support draft fsins/fcoss/ternlogi instructions
    • submitted on 2022-06-16
    • paid on 2022-09-06
    • €225 out of total of €725
    • this task is part of MoU Milestone Bug #577
  • Bug #835: add support for smtlib2 floating-point to yosys and nmigen
    • submitted on 2022-09-05
    • paid on 2022-09-06
    • €800 out of total of €2600
    • this task is part of MoU Milestone Bug #196
  • Bug #844: binutils: implement the first revision with magic instruction
    • submitted on 2022-06-16
    • paid on 2022-09-06
    • €300 out of total of €1300
    • this task is part of MoU Milestone Bug #577
  • Bug #845: binutils: drop svmagic and deal with the prefix instead
    • submitted on 2022-06-16
    • paid on 2022-09-06
    • €300 out of total of €1150
    • this task is part of MoU Milestone Bug #577
  • Bug #849: binutils: parse macros in SVP64 and refactor code
    • submitted on 2022-06-16
    • paid on 2022-09-06
    • €300 out of total of €2400
    • this task is part of MoU Milestone Bug #577
  • Bug #857: binutils: provide tests for setvl/svstep/svshape/svremap
    • submitted on 2022-08-28
    • paid on 2022-08-31
    • €150 out of total of €650
    • this task is part of MoU Milestone Bug #577
  • Bug #867: add svindex instruction to binutils (and openpower-isa infrastructure)
    • submitted on 2022-09-05
    • paid on 2022-09-06
    • €500 out of total of €1200
    • this task is part of MoU Milestone Bug #577

MoU Milestone subtotals for paid payments

  • Bug #195: Formal correctness framework is needed for Power ISA
    • subtotal €3450 out of total including subtasks of €12000

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  • Bug #198: Formal correctness proofs are needed for low-level libraries in LibreSOC
    • subtotal €150 out of total including subtasks of €9000

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  • Bug #196: Formal correctness proof needed for the IEEE754 FPU
    • subtotal €1100 out of total including subtasks of €12000

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  • Bug #577: gcc compiler, binutils and assembly macros for OpenPOWER-SV
    • subtotal €2275 out of total including subtasks of €12000

NLNet.2019.10.046.Standards

  • Bug #214: ISAMUX/NS Standard writeup needed
    • submitted on 2022-06-25
    • paid on 2022-07-21
    • €1250 out of total of €2500
    • this task is a MoU Milestone
  • Bug #237: Variable encoding Standards writeup needed, 16/32/48/64
    • submitted on 2022-06-16
    • paid on 2022-07-21
    • €1250 out of total of €2500
    • this task is a MoU Milestone
  • Bug #239: FP16 (and FP128) POWER Formal Standard proposal
    • submitted on 2022-06-25
    • paid on 2022-07-21
    • €1250 out of total of €2500
    • this task is a MoU Milestone
  • Bug #240: POWER-RISCV ISA switch formal standard writeup needed
    • submitted on 2022-06-25
    • paid on 2022-07-21
    • €1000 out of total of €3000
    • this task is a MoU Milestone
  • Bug #241: OpenPOWER Simulation is needed of standards
    • submitted on 2022-09-30
    • paid on 2022-10-14
    • €700 which is the total amount
    • this task is a MoU Milestone
  • Bug #269: auto-conversion / parser of POWER ISA Spec v3.0B
    • paid on 2020-04-27
    • €500 out of total of €1000
    • this task is part of MoU Milestone Bug #241
  • Bug #272: functions needed in POWER simulator which match 3.0B spec
    • paid on 2020-10-19
    • €50 out of total of €250
    • this task is part of MoU Milestone Bug #241
  • Bug #463: python based cycle accurate POWER9 simulator
    • paid on 2020-08-10
    • €1000 out of total of €2000
    • this task is part of MoU Milestone Bug #241
  • Bug #463: python based cycle accurate POWER9 simulator
    • submitted on 2022-06-25
    • paid on 2022-07-21
    • €1000 out of total of €2000
    • this task is part of MoU Milestone Bug #241
  • Bug #533: design new CR instructions suitable for predication
    • submitted on 2022-06-16
    • paid on 2022-07-21
    • €800 out of total of €1000
    • this task is part of MoU Milestone Bug #213
  • Bug #588: add SVP64 to PowerDecoder2
    • submitted on 2022-06-25
    • paid on 2022-07-21
    • €700 out of total of €1000
    • this task is part of MoU Milestone Bug #241
  • Bug #604: ISACaller simulator needs RADIX MMU support
    • submitted on 2021-12-09
    • paid on 2021-12-09
    • €500 out of total of €800
    • this task is part of MoU Milestone Bug #241
  • Bug #647: add FP support to ISACaller simulator
    • submitted on 2022-06-25
    • paid on 2022-07-21
    • €750 which is the total amount
    • this task is part of MoU Milestone Bug #241
  • Bug #653: investigate FFT, DCT, etc for REMAP in SVP64
    • submitted on 2021-12-09
    • paid on 2021-12-09
    • €1600 which is the total amount
    • this task is part of MoU Milestone Bug #242
  • Bug #664: design SVP64 branch instructions (sv.bc)
    • submitted on 2022-06-16
    • paid on 2022-07-21
    • €1000 out of total of €1500
    • this task is part of MoU Milestone Bug #213
  • Bug #665: very basic nmigen-to-c compiler needed
    • submitted on 2022-06-25
    • paid on 2022-07-21
    • €1700 out of total of €2200
    • this task is part of MoU Milestone Bug #241
  • Bug #686: create Power ISA test API
    • submitted on 2022-09-30
    • paid on 2022-10-14
    • €800 out of total of €1600
    • this task is part of MoU Milestone Bug #242
  • Bug #686: create Power ISA test API
    • submitted on 2021-12-09
    • paid on 2021-12-09
    • €800 out of total of €1600
    • this task is part of MoU Milestone Bug #242
  • Bug #699: Draft Release v0.1 of SVP64
    • submitted on 2021-12-09
    • paid on 2021-12-09
    • €4300 out of total of €5500
    • this task is part of MoU Milestone Bug #213
  • Bug #702: SVP64 REMAP Matrix unit tests
    • submitted on 2021-12-09
    • paid on 2021-12-09
    • €600 which is the total amount
    • this task is part of MoU Milestone Bug #242
  • Bug #703: Initial SVP64 Power ISA Decoder
    • submitted on 2022-06-16
    • paid on 2022-07-21
    • €800 which is the total amount
    • this task is part of MoU Milestone Bug #241
  • Bug #712: introduce XLEN-friendly helper class which aggregates all helpers
    • submitted on 2021-12-09
    • paid on 2021-12-09
    • €100 out of total of €500
    • this task is part of MoU Milestone Bug #241
  • Bug #730: adapt ALU test cases to include expected results
    • submitted on 2022-09-30
    • paid on 2022-10-14
    • €100 out of total of €1000
    • this task is part of MoU Milestone Bug #242
  • Bug #730: adapt ALU test cases to include expected results
    • submitted on 2021-12-09
    • paid on 2021-12-09
    • €200 out of total of €1000
    • this task is part of MoU Milestone Bug #242
  • Bug #839: SVP64 / Extra-V / ZOLC whitepaper
    • submitted on 2022-06-16
    • paid on 2022-07-21
    • €1300 out of total of €2000
    • this task is part of MoU Milestone Bug #243
  • Bug #858: SVP64 Primer Documentation
    • submitted on 2022-07-04
    • paid on 2022-07-08
    • €1500 out of total of €3000
    • this task is part of MoU Milestone Bug #243
  • Bug #875: SVP64 Spec Document Generation
    • submitted on 2022-07-04
    • paid on 2022-07-08
    • €650 out of total of €1000
    • this task is part of MoU Milestone Bug #243
  • Bug #880: setvl CTR unit tests needed
    • submitted on 2022-07-04
    • paid on 2022-07-08
    • €200 which is the total amount
    • this task is part of MoU Milestone Bug #242

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  • Bug #214: ISAMUX/NS Standard writeup needed
    • subtotal €1250 out of total including subtasks of €2500

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  • Bug #237: Variable encoding Standards writeup needed, 16/32/48/64
    • subtotal €1250 out of total including subtasks of €2500

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  • Bug #239: FP16 (and FP128) POWER Formal Standard proposal
    • subtotal €1250 out of total including subtasks of €2500

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  • Bug #240: POWER-RISCV ISA switch formal standard writeup needed
    • subtotal €1000 out of total including subtasks of €3000

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  • Bug #241: OpenPOWER Simulation is needed of standards
    • subtotal €7800 out of total including subtasks of €12000

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  • Bug #213: SimpleV Standard writeup needed
    • subtotal €6100 out of total including subtasks of €8000

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  • Bug #242: OpenPOWER simulation unit tests are needed
    • subtotal €4300 out of total including subtasks of €6000

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  • Bug #243: Documentation budget for OpenPower Member discussion and proposals
    • subtotal €3450 out of total including subtasks of €6000

NLNet.2019.10.043.Wishbone

  • Bug #186: Create decoder for SOC: Power ISA
    • paid on 2020-10-21
    • €200 out of total of €500
    • this task is part of MoU Milestone Bug #383
  • Bug #186: Create decoder for SOC: Power ISA
    • paid on 2020-12-06
    • €200 out of total of €500
    • this task is part of MoU Milestone Bug #383
  • Bug #305: Create Pipelined ALU similar to alu_hier.py
    • paid on 2020-08-21
    • €200 out of total of €400
    • this task is part of MoU Milestone Bug #383
  • Bug #305: Create Pipelined ALU similar to alu_hier.py
    • submitted on 2021-04-24
    • paid on 2021-05-01
    • €200 out of total of €400
    • this task is part of MoU Milestone Bug #383
  • Bug #313: Create Branch Pipeline for POWER9
    • paid on 2020-08-21
    • €100 out of total of €250
    • this task is part of MoU Milestone Bug #383
  • Bug #313: Create Branch Pipeline for POWER9
    • submitted on 2021-04-24
    • paid on 2021-05-01
    • €150 out of total of €250
    • this task is part of MoU Milestone Bug #383
  • Bug #314: Create POWER9 Condition Register pipeline
    • paid on 2020-08-21
    • €100 out of total of €300
    • this task is part of MoU Milestone Bug #383
  • Bug #314: Create POWER9 Condition Register pipeline
    • submitted on 2021-04-24
    • paid on 2021-05-01
    • €200 out of total of €300
    • this task is part of MoU Milestone Bug #383
  • Bug #323: create POWER9 MUL pipeline
    • paid on 2020-08-21
    • €250 out of total of €750
    • this task is part of MoU Milestone Bug #383
  • Bug #324: create POWER DIV pipeline
    • paid on 2020-08-14
    • €500 out of total of €1500
    • this task is part of MoU Milestone Bug #383
  • Bug #325: create POWER9 TRAP pipeline
    • paid on 2020-10-01
    • €300 out of total of €500
    • this task is part of MoU Milestone Bug #383
  • Bug #325: create POWER9 TRAP pipeline
    • submitted on 2022-06-25
    • paid on 2022-07-21
    • €100 out of total of €500
    • this task is part of MoU Milestone Bug #383
  • Bug #330: create POWER9 Logic Pipeline
    • paid on 2020-08-21
    • €150 out of total of €300
    • this task is part of MoU Milestone Bug #383
  • Bug #330: create POWER9 Logic Pipeline
    • submitted on 2021-04-24
    • paid on 2021-05-01
    • €150 out of total of €300
    • this task is part of MoU Milestone Bug #383
  • Bug #339: create POWER9 ROTATE (SHIFTROT) pipeline
    • paid on 2020-08-21
    • €300 which is the total amount
    • this task is part of MoU Milestone Bug #383
  • Bug #344: missing mtmsr and mfsprd
    • paid on 2020-08-21
    • €100 which is the total amount
    • this task is part of MoU Milestone Bug #383
  • Bug #345: define POWER9 regfiles
    • paid on 2020-08-21
    • €200 which is the total amount
    • this task is part of MoU Milestone Bug #383
  • Bug #346: simplified test link between compunits and regfile
    • paid on 2020-08-21
    • €750 which is the total amount
    • this task is part of MoU Milestone Bug #383
  • Bug #348: POWER9 SPR pipeline needed
    • submitted on 2020-12-06
    • paid on 2020-12-06
    • €250 out of total of €300
    • this task is part of MoU Milestone Bug #383
  • Bug #349: privileged-instruction decoding function needed
    • submitted on 2020-12-06
    • paid on 2020-12-06
    • €100 which is the total amount
    • this task is part of MoU Milestone Bug #383
  • Bug #351: create a "block" (mass) regfile port (read and write) onto an array-based regfile
    • paid on 2020-10-01
    • €100 out of total of €200
    • this task is part of MoU Milestone Bug #383
  • Bug #382: nmigen wishbone Memory (SRAM) object needed
    • paid on 2020-08-21
    • €150 which is the total amount
    • this task is part of MoU Milestone Bug #383
  • Bug #383: Complete first functional POWER9 Core
    • submitted on 2022-10-07
    • paid on 2022-10-14
    • €100 which is the total amount
    • this task is a MoU Milestone
  • Bug #393: Hook up augmented-Wishbone Memory Bus to LDSTCompUnit (via PortInterface)
    • paid on 2020-08-21
    • €300 which is the total amount
    • this task is part of MoU Milestone Bug #383
  • Bug #407: XICS interrupt controller is needed
    • submitted on 2020-12-06
    • paid on 2020-12-06
    • €450 which is the total amount
    • this task is part of MoU Milestone Bug #383
  • Bug #409: deal with illegal instruction in simulator and hardware
    • paid on 2020-08-21
    • €100 which is the total amount
    • this task is part of MoU Milestone Bug #383
  • Bug #414: debug port needed (JTAG, other frontend)
    • paid on 2020-08-21
    • €250 which is the total amount
    • this task is part of MoU Milestone Bug #383
  • Bug #416: dec and tb POWER9 SPRs needed
    • submitted on 2020-12-06
    • paid on 2020-12-06
    • €200 which is the total amount
    • this task is part of MoU Milestone Bug #383
  • Bug #426: LDST sign-extension support needed
    • submitted on 2020-12-06
    • paid on 2020-12-06
    • €100 which is the total amount
    • this task is part of MoU Milestone Bug #383
  • Bug #427: LDST cache-inhibit instructions needed (l*cix, st*cix)
    • submitted on 2021-04-24
    • paid on 2021-05-01
    • €200 which is the total amount
    • this task is part of MoU Milestone Bug #383
  • Bug #435: PC and MSR need to be in the "state" (Decode2Execute1Type)
    • paid on 2020-08-19
    • €100 which is the total amount
    • this task is part of MoU Milestone Bug #383
  • Bug #441: Avoid unit tests that depend on other unit tests being run first
    • paid on 2020-08-21
    • €200 out of total of €400
    • this task is part of MoU Milestone Bug #383
  • Bug #458: PartitionedSignal needs nmigen constructs "m.If", Switch etc
    • submitted on 2022-06-25
    • paid on 2022-07-21
    • €1000 out of total of €1250
    • this task is part of MoU Milestone Bug #362
  • Bug #460: Documenting the Out of Order architecture
    • paid on 2020-08-21
    • €500 which is the total amount
    • this task is part of MoU Milestone Bug #384
  • Bug #468: wishbone downconverter needed
    • submitted on 2020-12-06
    • paid on 2020-12-06
    • €200 which is the total amount
    • this task is part of MoU Milestone Bug #249
  • Bug #476: addme ALU pipeline bug
    • submitted on 2020-12-06
    • paid on 2020-12-06
    • €100 which is the total amount
    • this task is part of MoU Milestone Bug #383
  • Bug #478: MFOCR and MCROF need to be one-hot
    • submitted on 2020-12-06
    • paid on 2020-12-06
    • €200 which is the total amount
    • this task is part of MoU Milestone Bug #383
  • Bug #484: Write VHDL to expose CR and XER from Microwatt so single-stepping is possible
    • submitted on 2022-06-25
    • paid on 2022-07-21
    • €150 which is the total amount
    • this task is part of MoU Milestone Bug #383
  • Bug #493: DMI JTAG TAP needed
    • submitted on 2020-12-06
    • paid on 2020-12-06
    • €250 out of total of €400
    • this task is part of MoU Milestone Bug #383
  • Bug #556: document SV OpenPOWER
    • submitted on 2021-04-24
    • paid on 2021-05-01
    • €900 which is the total amount
    • this task is part of MoU Milestone Bug #384
  • Bug #594: create nmigen RFC for Dynamic Partitioned signals support
    • submitted on 2022-06-25
    • paid on 2022-07-21
    • €1500 which is the total amount
    • this task is part of MoU Milestone Bug #384
  • Bug #654: dev-env-setup script for symbiflow (arty A7-100T)
    • submitted on 2021-12-09
    • paid on 2021-12-09
    • €150 out of total of €750
    • this task is part of MoU Milestone Bug #384
  • Bug #717: Document Power ISA test API
    • submitted on 2022-10-07
    • paid on 2022-10-14
    • €400 out of total of €500
    • this task is part of MoU Milestone Bug #384
  • Bug #717: Document Power ISA test API
    • submitted on 2022-06-25
    • paid on 2022-07-21
    • €100 out of total of €500
    • this task is part of MoU Milestone Bug #384
  • Bug #733: document SimdSignal.__Slice__ as part of Partitioned SIMD RFC
    • submitted on 2022-06-25
    • paid on 2022-07-21
    • €350 which is the total amount
    • this task is part of MoU Milestone Bug #384

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  • Bug #383: Complete first functional POWER9 Core
    • subtotal €7450 out of total including subtasks of €10000

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  • Bug #362: improvements to nmigen and yosys
    • subtotal €1000 out of total including subtasks of €7000

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  • Bug #384: Documentation for the Libre-SOC Power ISA Core and internal architecture
    • subtotal €3900 out of total including subtasks of €6900

MoU Milestone subtotals for paid payments

  • Bug #249: Additional Wishbone B4 peripherals for Libre-SOC (including conversion from patented AXI4)
    • subtotal €200 out of total including subtasks of €12500

NLNet.2019.02.029.Coriolis2

  • Bug #178: first coriolis2 tutorial, workflow and "test project" page
    • paid on 2020-03-14
    • €1200 out of total of €3000
    • this task is a MoU Milestone
  • Bug #200: IEEE754 FPU Coriolis2 layout
    • submitted on 2021-12-09
    • paid on 2021-12-09
    • €750 out of total of €7000
    • this task is a MoU Milestone
  • Bug #202: potential changes to LibreSOC HDL to suit coriolis2
    • submitted on 2021-04-24
    • paid on 2021-04-24
    • €3000 out of total of €6000
    • this task is a MoU Milestone
  • Bug #205: documentation of coriolis2 layout process for 180nm
    • submitted on 2022-07-04
    • paid on 2022-07-21
    • €3800 which is the total amount
    • this task is a MoU Milestone
  • Bug #490: Complete peripheral set including litex for first functional OpenPOWER Core (ls180)
    • submitted on 2021-04-24
    • paid on 2021-05-01
    • €1750 out of total of €2000
    • this task is part of MoU Milestone Bug #199
  • Bug #502: determine SRAM block size and implement it
    • submitted on 2021-04-24
    • paid on 2021-05-01
    • €300 out of total of €1250
    • this task is part of MoU Milestone Bug #199
  • Bug #506: 8x VDD VSS pins needed in ioring
    • submitted on 2021-04-24
    • paid on 2021-05-01
    • €450 out of total of €600
    • this task is part of MoU Milestone Bug #199
  • Bug #507: ls180 asic needs an ioring, pads need defining and connecting
    • submitted on 2020-12-06
    • paid on 2020-12-06
    • €750 out of total of €1500
    • this task is part of MoU Milestone Bug #199
  • Bug #508: decide package size and pin allocation for 180nm ASIC
    • submitted on 2020-12-06
    • paid on 2020-12-06
    • €50 out of total of €100
    • this task is part of MoU Milestone Bug #199
  • Bug #521: small example using JTAG for testing coriolis2 new multi clock plugin
    • submitted on 2020-12-06
    • paid on 2020-12-06
    • €300 out of total of €400
    • this task is part of MoU Milestone Bug #199
  • Bug #620: post-layout simulation needed using cocotb
    • submitted on 2021-04-24
    • paid on 2021-05-01
    • €1250 out of total of €2500
    • this task is part of MoU Milestone Bug #199

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  • Bug #178: first coriolis2 tutorial, workflow and "test project" page
    • subtotal €1200 out of total including subtasks of €3000

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  • Bug #200: IEEE754 FPU Coriolis2 layout
    • subtotal €750 out of total including subtasks of €7000

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  • Bug #202: potential changes to LibreSOC HDL to suit coriolis2
    • subtotal €3000 out of total including subtasks of €6000

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  • Bug #205: documentation of coriolis2 layout process for 180nm
    • subtotal €3800 out of total including subtasks of €4000

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  • Bug #199: Layout using coriolis2 main core, 180nm
    • subtotal €4850 out of total including subtasks of €9000

NLNet.2019.10.031.Video

  • Bug #222: JPEG optimizations
    • submitted on 2022-10-04
    • paid on 2022-10-11
    • €300 out of total of €1500
    • this task is a MoU Milestone
  • Bug #223: MPEG1/2 optimizations
    • submitted on 2022-10-04
    • paid on 2022-10-11
    • €750 out of total of €1500
    • this task is a MoU Milestone
  • Bug #229: AV1 optimizations
    • submitted on 2022-10-14
    • paid on 2022-10-20
    • €800 out of total of €4000
    • this task is a MoU Milestone
  • Bug #557: First round of development of Audio/Video opcodes
    • submitted on 2021-04-24
    • paid on 2021-05-01
    • €1100 out of total of €2000
    • this task is part of MoU Milestone Bug #230
  • Bug #864: implement parallel prefix reduction in simulator
    • submitted on 2022-09-12
    • paid on 2022-09-15
    • €1800 out of total of €3000
    • this task is part of MoU Milestone Bug #233
  • Bug #881: Initial work on RFC for OpenPower fpr <-> gpr moves/conversions
    • submitted on 2022-07-20
    • paid on 2022-07-21
    • €800 out of total of €2000
    • this task is part of MoU Milestone Bug #230
  • Bug #884: sync pysvp64asm register parsing
    • submitted on 2022-07-20
    • paid on 2022-07-21
    • €1250 out of total of €3500
    • this task is part of MoU Milestone Bug #232
  • Bug #885: add svindex instruction
    • submitted on 2022-07-20
    • paid on 2022-07-21
    • €1500 which is the total amount
    • this task is part of MoU Milestone Bug #232
  • Bug #887: implement fmvis and 2nd-half variant
    • submitted on 2022-09-12
    • paid on 2022-09-15
    • €500 out of total of €2500
    • this task is part of MoU Milestone Bug #234

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  • Bug #222: JPEG optimizations
    • subtotal €300 out of total including subtasks of €1500

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  • Bug #223: MPEG1/2 optimizations
    • subtotal €750 out of total including subtasks of €1500

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  • Bug #229: AV1 optimizations
    • subtotal €800 out of total including subtasks of €4000

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  • Bug #230: Video opcode development and discussion
    • subtotal €1900 out of total including subtasks of €4000

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  • Bug #233: Audio and Video unit tests needed to be run in simulator
    • subtotal €1800 out of total including subtasks of €3000

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  • Bug #232: Implementation of video opcodes in simulator
    • subtotal €2750 out of total including subtasks of €5000

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  • Bug #234: Hardware implementation of video opcodes
    • subtotal €500 out of total including subtasks of €9000

NLNet.2019.10.042.Vulkan

  • Bug #139: Swizzle needs to be high priority capability in ISA
    • submitted on 2022-06-16
    • paid on 2022-07-21
    • €900 out of total of €1500
    • this task is part of MoU Milestone Bug #255
  • Bug #466: comprehensive evaluation and planning for 3D MESA driver
    • submitted on 2022-06-16
    • paid on 2022-07-21
    • €300 out of total of €500
    • this task is part of MoU Milestone Bug #251
  • Bug #794: UTF8 validation
    • submitted on 2022-09-15
    • paid on 2022-09-16
    • €500 out of total of €2500
    • this task is part of MoU Milestone Bug #254
  • Bug #851: vector pack/unpack needed (as REMAP and as RM Modes)
    • submitted on 2022-06-16
    • paid on 2022-07-21
    • €800 out of total of €1200
    • this task is part of MoU Milestone Bug #255
  • Bug #871: implement pack/unpack mode in ISACaller
    • submitted on 2022-09-27
    • paid on 2022-10-11
    • €4000 which is the total amount
    • this task is part of MoU Milestone Bug #254
  • Bug #911: svshape2 instruction (with offsets)
    • submitted on 2022-09-15
    • paid on 2022-09-16
    • €1500 out of total of €3000
    • this task is part of MoU Milestone Bug #254
  • Bug #917: pysvp64dis: support SVP64 disassembly
    • submitted on 2022-09-25
    • paid on 2022-10-04
    • €500 out of total of €3000
    • this task is part of MoU Milestone Bug #254

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  • Bug #255: formal standard documentation of 3D Opcodes
    • subtotal €1700 out of total including subtasks of €6000

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  • Bug #251: Initial 3D MESA non-accelerated software-only driver is needed
    • subtotal €300 out of total including subtasks of €12000

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  • Bug #254: Second iteration round for opcodes, simulation and hardware for 3D MESA
    • subtotal €6500 out of total including subtasks of €12500

NLnet.2021.02A.052.CryptoRouter

  • Bug #745: OP_TERNLOG instruction
    • submitted on 2023-09-10
    • paid on 2023-09-15
    • €200 out of total of €1000
    • this task is part of MoU Milestone Bug #772
  • Bug #755: add grev instruction (OP_GREV)
    • submitted on 2023-09-29
    • paid on 2023-10-04
    • €500 out of total of €1500
    • this task is part of MoU Milestone Bug #772
  • Bug #770: Discussion and Finalisation of Which Cryptographic Primitives to Implement
    • submitted on 2022-12-08
    • paid on 2022-12-13
    • €1300 out of total of €2000
    • this task is a MoU Milestone
  • Bug #784: Implement cl* instructions for carry-less operations
    • submitted on 2023-09-29
    • paid on 2023-10-04
    • €1200 out of total of €3000
    • this task is part of MoU Milestone Bug #772
  • Bug #817: Big Integer Math (sv.adde, sv.subfe, sv.madded, 128 by 64-bit -> 64-bit div/rem, maybe more...)
    • submitted on 2023-03-25
    • paid on 2023-04-26
    • €1200 out of total of €3500
    • this task is part of MoU Milestone Bug #771
  • Bug #882: add support for showing the nearest budgeting parent that is included in the MoU
    • submitted on 2023-03-25
    • paid on 2023-04-26
    • €450 out of total of €1400
    • this task is part of MoU Milestone Bug #775
  • Bug #966: create shift-and-add instruction
    • submitted on 2023-03-25
    • paid on 2023-04-26
    • €150 out of total of €750
    • this task is part of MoU Milestone Bug #771
  • Bug #968: document shift-and-add instruction
    • submitted on 2023-03-25
    • paid on 2023-04-26
    • €450 out of total of €900
    • this task is part of MoU Milestone Bug #776
  • Bug #977: chacha20 round unit test
    • submitted on 2022-12-08
    • paid on 2022-12-13
    • €1600 which is the total amount
    • this task is part of MoU Milestone Bug #840
  • Bug #1007: implement chacha20 in svp64 assembler
    • submitted on 2023-03-25
    • paid on 2023-04-26
    • €400 out of total of €1500
    • this task is part of MoU Milestone Bug #773
  • Bug #1044: SVP64 implementation of pow(x,y,z)
    • submitted on 2023-11-30
    • paid on 2023-12-19
    • €1000 out of total of €2000
    • this task is a MoU Milestone

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  • Bug #772: Creation of the HDL Code for the cryptoprimitive (bitmanip, bigint, etc.) Instructions
    • subtotal €1900 out of total including subtasks of €9000

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  • Bug #770: Discussion and Finalisation of Which Cryptographic Primitives to Implement
    • subtotal €1300 out of total including subtasks of €2000

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  • Bug #771: Creation of Cryptographic-Primitive OpenPower ISA Pseudo-code
    • subtotal €1350 out of total including subtasks of €6000

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  • Bug #775: Project Management
    • subtotal €450 out of total including subtasks of €4000

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  • Bug #776: Documentation of designs, code, processes, and other relevant things as needed
    • subtotal €450 out of total including subtasks of €8000

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  • Bug #840: Formal proofs and unit tests for cryptoprimitives
    • subtotal €1600 out of total including subtasks of €9500

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  • Bug #773: High-Level Demos of Cryptographic and Other Relevant Algorithms
    • subtotal €400 out of total including subtasks of €5500

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  • Bug #1044: SVP64 implementation of pow(x,y,z)
    • subtotal €1000 out of total including subtasks of €2000

NGI.POINTER.Gigabit.ASIC

  • Bug #692: NGI POINTER Kickoff 2021 Sep 13
    • paid on 2022-04-22
    • €10000 out of total of €30000
    • this task is a MoU Milestone
  • Bug #815: Planning meetings for NGI POINTER Milestone 2
    • paid on 2022-07-09
    • €1000 out of total of €5000
    • this task is part of MoU Milestone Bug #814
  • Bug #816: FPGA equipment for NGI POINTER
    • paid on 2022-07-09
    • €1000 which is the total amount
    • this task is part of MoU Milestone Bug #814
  • Bug #818: Simulation of ls2 peripheral fabric with core
    • paid on 2022-07-09
    • €2000 out of total of €12000
    • this task is part of MoU Milestone Bug #814

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  • Bug #692: NGI POINTER Kickoff 2021 Sep 13
    • subtotal €10000 out of total including subtasks of €30000

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  • Bug #814: NGI POINTER Milestone 2
    • subtotal €4000 out of total including subtasks of €40000

NLnet.2021-08-071.cavatools

  • Bug #982: Support PowerPC ABI in ISACaller
    • submitted on 2023-11-04
    • paid on 2023-11-24
    • €1300 out of total of €4500
    • this task is a MoU Milestone
  • Bug #983: Support PowerPC SFFS compliance
    • submitted on 2023-12-02
    • paid on 2023-12-19
    • €1100 out of total of €6000
    • this task is a MoU Milestone
  • Bug #987: cavatools-related administrative activities
    • submitted on 2023-12-21
    • paid on 2024-01-10
    • €1000 out of total of €2000
    • this task is a MoU Milestone

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  • Bug #982: Support PowerPC ABI in ISACaller
    • subtotal €1300 out of total including subtasks of €4500

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  • Bug #983: Support PowerPC SFFS compliance
    • subtotal €1100 out of total including subtasks of €6000

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  • Bug #987: cavatools-related administrative activities
    • subtotal €1000 out of total including subtasks of €3000

NLnet.2022-08-051.OPF

  • Bug #672: create SVP64 demo / unit test "positional popcount"
    • submitted on 2024-01-05
    • paid on 2024-01-25
    • €1000 out of total of €2000
    • this task is part of MoU Milestone Bug #953
  • Bug #676: FORTRAN MAXLOC SVP64 example
    • submitted on 2024-02-12
    • paid on 2024-02-29
    • €1500 out of total of €2000
    • this task is part of MoU Milestone Bug #953
  • Bug #701: document Matrix REMAP in SVP64
    • submitted on 2023-12-01
    • paid on 2023-12-19
    • €1000 out of total of €2000
    • this task is part of MoU Milestone Bug #953
  • Bug #988: XLEN OPF ISA WG RFC ls005
    • submitted on 2023-06-22
    • paid on 2023-06-25
    • €1500 which is the total amount
    • this task is part of MoU Milestone Bug #1009
  • Bug #1010: 1st Draft OPF ISA WG External RFC ls003: "bigint" operations
    • submitted on 2023-06-22
    • paid on 2023-06-25
    • €1250 out of total of €2000
    • this task is part of MoU Milestone Bug #1009
  • Bug #1015: rfc for rest of int/fp move/convert ls006
    • submitted on 2024-02-09
    • paid on 2024-02-29
    • €1000 out of total of €3500
    • this task is part of MoU Milestone Bug #1009
  • Bug #1017: ISA WG RFC ls007 for binary and ternary bitops
    • submitted on 2023-06-22
    • paid on 2023-06-25
    • €1000 out of total of €2000
    • this task is part of MoU Milestone Bug #1009
  • Bug #1040: write up SVP64 RFC for "managment" instructions: ls008
    • submitted on 2023-06-22
    • paid on 2023-06-25
    • €1500 out of total of €2500
    • this task is part of MoU Milestone Bug #1009
  • Bug #1042: OPF ISA External RFC ls009 - SVP64 svremap, svindex, svshape, svshape2
    • submitted on 2023-06-22
    • paid on 2023-06-25
    • €1000 out of total of €2500
    • this task is part of MoU Milestone Bug #1009
  • Bug #1045: OPF ISA External RFC ls010 - SVP64 Zero-Overhead Loop Prefix System
    • submitted on 2023-06-22
    • paid on 2023-06-25
    • €1300 out of total of €3500
    • this task is part of MoU Milestone Bug #1009
  • Bug #1052: OPF RFC ls012 writeup: list of RFCs to be proposed to OPF ISA WG
    • submitted on 2023-06-22
    • paid on 2023-06-25
    • €1400 out of total of €2500
    • this task is part of MoU Milestone Bug #1009
  • Bug #1055: update ls004 OPF RFC to include LD-ST-Shifted instructions
    • submitted on 2024-02-07
    • paid on 2024-02-29
    • €1500 out of total of €2500
    • this task is part of MoU Milestone Bug #1009
  • Bug #1057: split out all int/fp min/max ops into their own RFC ls013
    • submitted on 2023-12-03
    • paid on 2023-12-19
    • €800 out of total of €2500
    • this task is part of MoU Milestone Bug #1009
  • Bug #1062: OPF RFC ls005.xlen iterative feedback and questions
    • submitted on 2024-01-05
    • paid on 2024-01-25
    • €1100 out of total of €2500
    • this task is part of MoU Milestone Bug #1012
  • Bug #1070: Simple-V / Libre-SOC FOSDEM Conference Feb 03-04 2024
    • submitted on 2024-02-07
    • paid on 2024-02-29
    • €800 out of total of €4500
    • this task is part of MoU Milestone Bug #1019
  • Bug #1074: create twin-butterfly research page into DCT/FFT instructions
    • submitted on 2024-02-07
    • paid on 2024-02-29
    • €500 out of total of €2500
    • this task is part of MoU Milestone Bug #1011
  • Bug #1092: OPF RFC ISA WG questions feedback on ls002 float-load-immediate
    • submitted on 2024-01-16
    • paid on 2024-01-25
    • €750 out of total of €2000
    • this task is part of MoU Milestone Bug #1012
  • Bug #1092: OPF RFC ISA WG questions feedback on ls002 float-load-immediate
    • submitted on 2024-01-11
    • paid on 2024-01-29
    • €750 out of total of €2000
    • this task is part of MoU Milestone Bug #1012
  • Bug #1117: daxpy cookbook example
    • submitted on 2024-01-05
    • paid on 2024-01-25
    • €1000 out of total of €2000
    • this task is part of MoU Milestone Bug #953

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  • Bug #953: SVP64 assembly cookbook
    • subtotal €4500 out of total including subtasks of €10000

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  • Bug #1009: Write and submit 1st Draft External RFCs
    • subtotal €12250 out of total including subtasks of €34000

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  • Bug #1012: Iterative OPF ISA WG questions, feedback, and re-submission
    • subtotal €2600 out of total including subtasks of €22000

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  • Bug #1019: OPF ISA WG Draft RFC Presentations, Conferences and general outreach
    • subtotal €800 out of total including subtasks of €9000

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  • Bug #1011: OPF ISA WG Draft RFC Research
    • subtotal €500 out of total including subtasks of €19000

NLnet.2022-08-107.ongoing

  • Bug #1028: implement integer-versions of fft/dct "butterfly" instructions in ISACaller Simulator
    • submitted on 2024-02-26
    • paid on 2024-03-08
    • €500 out of total of €4000
    • this task is part of MoU Milestone Bug #1027
  • Bug #1028: implement integer-versions of fft/dct "butterfly" instructions in ISACaller Simulator
    • submitted on 2024-02-26
    • paid on 2024-03-08
    • €2700 out of total of €4000
    • this task is part of MoU Milestone Bug #1027
  • Bug #1030: Enable compilation of PyPowersim on non-power platforms.
    • submitted on 2024-02-26
    • paid on 2024-03-08
    • €400 out of total of €2000
    • this task is part of MoU Milestone Bug #1027
  • Bug #1030: Enable compilation of PyPowersim on non-power platforms.
    • submitted on 2024-02-26
    • paid on 2024-03-08
    • €1600 out of total of €2000
    • this task is part of MoU Milestone Bug #1027
  • Bug #1035: Implement Scalar Power ISA v3.1 (32-bit-only) instructions (no PO1) in ISACaller
    • submitted on 2024-02-26
    • paid on 2024-03-08
    • €1000 out of total of €4000
    • this task is a MoU Milestone
  • Bug #1072: implement fcvt/fmv instructions in ISACaller (ls006)
    • submitted on 2024-02-26
    • paid on 2024-03-08
    • €500 out of total of €3000
    • this task is part of MoU Milestone Bug #1026
  • Bug #1094: insndb instruction database visitor-walker is needed
    • submitted on 2024-02-26
    • paid on 2024-03-08
    • €500 out of total of €4000
    • this task is part of MoU Milestone Bug #1003
  • Bug #1120: Add all scalar 32-bit v3.1 insns to ISACaller
    • submitted on 2024-02-26
    • paid on 2024-03-08
    • €700 out of total of €2000
    • this task is part of MoU Milestone Bug #1035
  • Bug #1128: Find a way to check that the SFFS binaries have no VSX instructions.
    • submitted on 2024-02-26
    • paid on 2024-03-08
    • €800 out of total of €2500
    • this task is part of MoU Milestone Bug #999
  • Bug #1130: Build Debian SFFS
    • submitted on 2024-02-26
    • paid on 2024-03-08
    • €1000 out of total of €2500
    • this task is part of MoU Milestone Bug #999
  • Bug #1131: Build Gentoo SFFS
    • submitted on 2024-02-26
    • paid on 2024-03-08
    • €1000 out of total of €2500
    • this task is part of MoU Milestone Bug #999
  • Bug #1132: Build qemu without **GUEST** vsx (***GUEST*** is SFFS only)
    • submitted on 2024-02-26
    • paid on 2024-03-08
    • €1000 out of total of €2500
    • this task is part of MoU Milestone Bug #999

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  • Bug #1027: implement "necessary" additions to SVP64 and Scalar Power ISA
    • subtotal €5200 out of total including subtasks of €30000

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  • Bug #1035: Implement Scalar Power ISA v3.1 (32-bit-only) instructions (no PO1) in ISACaller
    • subtotal €1700 out of total including subtasks of €7000

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  • Bug #1026: implement Draft Instructions in nmigen HDL
    • subtotal €500 out of total including subtasks of €8000

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  • Bug #1003: instruction database continuation and binutils, SVP64
    • subtotal €500 out of total including subtasks of €10500

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  • Bug #999: SFFS Operating System Porting
    • subtotal €3800 out of total including subtasks of €10000