Tuesday 21st November 17:00 UTC


  • Learning SVP64 from Luke, setvl (Horizontal-First), svindex.
  • Luke suggested to look at Chacha20 example for Vertical-First (but not required).
  • Look at Luke's examples on Poly1305 bugreport


  • bug #1169

  • Helped Andrey with bug #1210 (see info in Andrey's section).

    • Implemented a solution, commit diff
    • Solution checked by Luke and Andrey, pushed to master.



  • Prioritise keeping to Nlnet grant deadlines, absolute priority.


  • Took Monday off as a break.

  • Luke and I in conversation with Michiel to finalise the ongoing grant MoU. (The MoU was signed the following week.)

  • Raised a bug report relating to ISACaller not taking a sv.bc branch in Vertical-First mode, bug #1210.

    • After checking with Python pdb, it was spotted that ISACaller correctly computes NIA (Next Instruction Address) based on branch condition, but this correct NIA is overwritten by extraneous NIA update (which defaults to to the next instruction address).
    • After Jacob pushed a fix in a branch, I ran the test and the sv.bc branch was taken correctly.
  • Continued to work on Libre-SOC documentation included in HDL workflow and libresoc bug process. See bug #1126 for updates.


  • cookbook example pospopcount with shriya
  • load/store shifted ls004
  • cookbook example maxloc, but stalled due to needing ddffirst
  • Working on Maxloc assembler example, run into same issue as Jacob, where scalar src/dest but need loop to continue.
  • So this feature is pretty important and needs to be added to the SVP64 spec


  • Load/store-shifted corrections, jacob to review (thank you)
  • maxloc research
  • pospopcount images