Why a Libre-SOC?

TLDR

We believe a computer should be safe to use, and this starts with a open processor.

We also believe that an open processor doesn't mean a weak processor.

Check out our mission.

The Lengthier Explanation...

Its quite hard to guarantee that performant processors (think pipelined, out-of-order) are functionally perfectly correct. In fact, it often turns out that they aren’t.

There are entire dissertations dedicated to the subject matter of merely functionally verifying a pipeline (this doesn’t even consider out of order execution).

Given the fact that performant bug-free processors no longer exist [1][2], how can you trust your processor [3]? The next best thing is to have access to a processor’s design files. Not only have access to them, you must have the freedom to study, improve them, run the test suites and be able to improve those too.

Not only that, you and everyone who has a stake in the success needs to be entirely free from NDAs and other restrictions which prevent and prohibit communication. An example: although you yourself might not have the technical capability to review our SoC, you can always find a third party to pay those who can. However if the source code was under NDA, do you think that would be practical to consider?

Collaboration, not competition.

Such a processor is referred to as a Libre processor. However, processors themselves are only a part of the picture. Nowadays, most contemporary computing tasks involve artificial intelligence, media consumption, wireless connectivity, etc... Thus, we must deliver an entire Libre-SOC.

• [1]: https://it.slashdot.org/story/20/03/09/2347202/amd-processors-from-2011-to-2019-vulnerable-to-two-new-attacks
• [2]: https://it.slashdot.org/story/20/03/10/176200/intel-cpus-vulnerable-to-new-lvi-attacks#comments
• [3]: https://libreboot.org/faq.html#intelme

Benefits: Privacy, Safety-Critical, Peace of Mind...

Our Libre-SOC will not have backdoors that plague modern processors.

There is a very real need for reliable safety critical processors (think airplane, smart car, nuclear power plant, pacemaker...). Libre-SOC posits that it is impossible to trust a processor in a safety critical environment without both access to that processor's source, a cycle accurate HDL simulator that guarantees developers their code behaves as they expect, and formal correctness proofs. An ISA level simulator is no longer satisfactory.

Refer to this IEEE article by Cyberphysical System expert Ed-Lee for more details.